S. Tsujikawa, H. Umeda, T. Hayashi, K. Ohnishi, K. Shiga, K. Kawase, J. Yugami, H. Yoshimura, M. Yoneda
{"title":"基于双核技术的富氧界面SiN栅极介电介质在hp65-SoC LOP中的应用","authors":"S. Tsujikawa, H. Umeda, T. Hayashi, K. Ohnishi, K. Shiga, K. Kawase, J. Yugami, H. Yoshimura, M. Yoneda","doi":"10.1109/IEDM.2006.347007","DOIUrl":null,"url":null,"abstract":"A solution of utilizing an N-rich SiON gate dielectric toward achieving highly reliable pMOS is demonstrated. The solution consists of a combination of two techniques: (1) a SiN-based gate dielectric with oxygen-enriched interface (OI-SiN) enabling nMOS and pMOS characteristics superior to plasma-nitrided oxides (PNO) and (2) a dual-core-SiON technique in which SiON in pMOS is selectively thickened by fluorine ion implantation to the poly-Si layer with the aim of acquiring NBTI immunity. The latter improved the NBTI immunity of pMOS with OI-SiN gate dielectrics to a level comparable to that with conventional PNO. Although the thickening of SiON using dual-core-SiON technique naturally decreases pMOS on-current, the performance remains superior to that with PNO","PeriodicalId":366359,"journal":{"name":"2006 International Electron Devices Meeting","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"SiN Gate Dielectric with Oxygen-enriched Interface (OI-SiN) Utilizing Dual-core-SiON Technique for hp65-SoC LOP Application\",\"authors\":\"S. Tsujikawa, H. Umeda, T. Hayashi, K. Ohnishi, K. Shiga, K. Kawase, J. Yugami, H. Yoshimura, M. Yoneda\",\"doi\":\"10.1109/IEDM.2006.347007\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A solution of utilizing an N-rich SiON gate dielectric toward achieving highly reliable pMOS is demonstrated. The solution consists of a combination of two techniques: (1) a SiN-based gate dielectric with oxygen-enriched interface (OI-SiN) enabling nMOS and pMOS characteristics superior to plasma-nitrided oxides (PNO) and (2) a dual-core-SiON technique in which SiON in pMOS is selectively thickened by fluorine ion implantation to the poly-Si layer with the aim of acquiring NBTI immunity. The latter improved the NBTI immunity of pMOS with OI-SiN gate dielectrics to a level comparable to that with conventional PNO. Although the thickening of SiON using dual-core-SiON technique naturally decreases pMOS on-current, the performance remains superior to that with PNO\",\"PeriodicalId\":366359,\"journal\":{\"name\":\"2006 International Electron Devices Meeting\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2006.347007\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2006.347007","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SiN Gate Dielectric with Oxygen-enriched Interface (OI-SiN) Utilizing Dual-core-SiON Technique for hp65-SoC LOP Application
A solution of utilizing an N-rich SiON gate dielectric toward achieving highly reliable pMOS is demonstrated. The solution consists of a combination of two techniques: (1) a SiN-based gate dielectric with oxygen-enriched interface (OI-SiN) enabling nMOS and pMOS characteristics superior to plasma-nitrided oxides (PNO) and (2) a dual-core-SiON technique in which SiON in pMOS is selectively thickened by fluorine ion implantation to the poly-Si layer with the aim of acquiring NBTI immunity. The latter improved the NBTI immunity of pMOS with OI-SiN gate dielectrics to a level comparable to that with conventional PNO. Although the thickening of SiON using dual-core-SiON technique naturally decreases pMOS on-current, the performance remains superior to that with PNO