用于FPGA实现的平行-垂直多输入加法器结构及软件模型

2016 XIth International Scientific and Technical Conference Computer Sciences and Information Technologies (CSIT) Pub Date : 2016-09-01 DOI:10.1109/STC-CSIT.2016.7589894

I. Tsmots, O. Skorokhoda, V. Rabyk

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引用次数: 14

摘要

本文分析了群求和的平行-垂直实现方法。实现了7输入个位数加法器合成的解析表达式。给出了该系统实现的结构和程序模型。

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Structure and software model of a parallel-vertical multi-input adder for FPGA implementation

In this paper parallel-vertical approach to realization of group summation has been analyzed. Analytical expression for synthesis of a 7-input single-digit adder have been realized. The structure and the program model for it implementation have been developed.

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来源期刊

2016 XIth International Scientific and Technical Conference Computer Sciences and Information Technologies (CSIT)

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