一种新的片上互连的简单RC模型及其在缓冲插入中的应用

Alaa R. Al-Taee, F. Yuan, A. Ye
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引用次数: 1

摘要

提出了一种改进的片上互连RC模型,该模型由基于awe的RLC模型的pi组态推导而来。提出了一个利用GAM、TPN和AWE方法生成RC、RLC和RLCG模型的所有可能的T和pi配置的平台。在此平台上生成了18种不同的RC、RLC和RLCG模型。AWE-RLC模型的pi配置提供了最好的性能。将该模型映射为改进的RC模型,既保持了RC模型的准确性,又保持了RC模型的简洁性。与传统RC模型相比,插入缓冲区后的互连延迟的仿真结果表明,该模型的延迟提高了20.5%,所需缓冲区数量减少了24%,缓冲区大小减少了32%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A new simple RC modeling for on-chip interconnects with its applications to buffer insertion
A new improved RC modeling for on-chip interconnects derived from pi-configuration of AWE-Based RLC model is presented. A platform utilized to generate all-possible T- and pi configurations of RC, RLC and RLCG models using GAM, TPN, and AWE methods is proposed. 18 different RC, RLC, and RLCG models are generated based on this platform. The pi-configuration of AWE-RLC model provides the best performance. This model is mapped into an improved RC model to preserve the accuracy of the RLC model while keeping the simplicity of the RC model. As compared with conventional RC model, the simulation results of interconnect's delay with buffer insertion show that the proposed RC model improves the delay by 20.5%, reduces the number of required buffers by 24%, and the buffer sizes by 32%.
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