一种高速编织的只读存储器

AFIPS '65 (Fall, part I) Pub Date : 1899-12-30 DOI:10.1145/1463891.1463977

H. Maeda, M. Takashima, A. Kolk

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引用次数: 4

摘要

编织，镀线存储器的概念已被证明为高速DRO和NDRO存储器阵列的建设提供了一种经济的制造技术。编织存储器的经济性源于两个因素:首先，存储器元件由镀有坡莫合金的合金铜线组成，这种铜线是通过廉价、易于控制的连续电镀工艺制成的;其次，编织技术构成了提供阵列布线的高度自动化的方法。

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A high-speed, woven read-only memory

The woven, plated-wire memory concept has been shown to provide an economical fabrication technique for the construction of high-speed DRO and NDRO memory arrays. The economies of the woven memory arise from two factors: first, the memory element consists of permalloy-plated, alloy copper wire which is made by an inexpensive, readily controllable, continuous plating process; and second, the weaving technique constitutes a highly automated method for providing the array wiring.

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来源期刊

AFIPS '65 (Fall, part I)

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