{"title":"一种动态可重构协处理器的设计,用于媒体处理和工业控制应用中的灵活精确矩阵算法","authors":"Hao Liu, Zhaolin Li, Zhixiang Chen","doi":"10.1109/ICIST.2013.6747645","DOIUrl":null,"url":null,"abstract":"Deep-micron semiconductor technology enables us to integrate more arithmetic and logic units in single modestly sized chip, so that many media processing and industrial control applications can utilize high performance, low power but not costly processors to meet more intensive computing or timing demands. Dynamic reconfigurable structure brings out a new design paradigm with a good balance between performance and flexibility, which can achieve hard-wired like performance and can be custom designed just by updating software. We propose a dynamic reconfigurable coprocessor for flexible precision matrix algorithms. It employs several dynamic reconfigurable multi-operation arithmetic units, aims at high-performance media processing and in industrial control applications. We analyze and implement four typical applications on the coprocessor, and contrast performances with implementations of ARM920EJ-S and TI TMS320C6713 DSP processor. Experimental result shows that the coprocessor has high speed-up factors with high-parallel algorithms.","PeriodicalId":415759,"journal":{"name":"2013 IEEE Third International Conference on Information Science and Technology (ICIST)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of a dynamic reconfigurable coprocessor for flexible precision matrix algorithms in media processing and industrial control applications\",\"authors\":\"Hao Liu, Zhaolin Li, Zhixiang Chen\",\"doi\":\"10.1109/ICIST.2013.6747645\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Deep-micron semiconductor technology enables us to integrate more arithmetic and logic units in single modestly sized chip, so that many media processing and industrial control applications can utilize high performance, low power but not costly processors to meet more intensive computing or timing demands. Dynamic reconfigurable structure brings out a new design paradigm with a good balance between performance and flexibility, which can achieve hard-wired like performance and can be custom designed just by updating software. We propose a dynamic reconfigurable coprocessor for flexible precision matrix algorithms. It employs several dynamic reconfigurable multi-operation arithmetic units, aims at high-performance media processing and in industrial control applications. We analyze and implement four typical applications on the coprocessor, and contrast performances with implementations of ARM920EJ-S and TI TMS320C6713 DSP processor. Experimental result shows that the coprocessor has high speed-up factors with high-parallel algorithms.\",\"PeriodicalId\":415759,\"journal\":{\"name\":\"2013 IEEE Third International Conference on Information Science and Technology (ICIST)\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE Third International Conference on Information Science and Technology (ICIST)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIST.2013.6747645\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Third International Conference on Information Science and Technology (ICIST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIST.2013.6747645","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a dynamic reconfigurable coprocessor for flexible precision matrix algorithms in media processing and industrial control applications
Deep-micron semiconductor technology enables us to integrate more arithmetic and logic units in single modestly sized chip, so that many media processing and industrial control applications can utilize high performance, low power but not costly processors to meet more intensive computing or timing demands. Dynamic reconfigurable structure brings out a new design paradigm with a good balance between performance and flexibility, which can achieve hard-wired like performance and can be custom designed just by updating software. We propose a dynamic reconfigurable coprocessor for flexible precision matrix algorithms. It employs several dynamic reconfigurable multi-operation arithmetic units, aims at high-performance media processing and in industrial control applications. We analyze and implement four typical applications on the coprocessor, and contrast performances with implementations of ARM920EJ-S and TI TMS320C6713 DSP processor. Experimental result shows that the coprocessor has high speed-up factors with high-parallel algorithms.