利用FPGA功能的进化二进制神经网络

Raul Valencia, Chiu-Wing Sham, O. Sinnen
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引用次数: 3

摘要

半导体技术的指数级发展使得深度学习成为一个突出的研究领域,神经网络已经证明了它在解决非常困难的多维问题方面的有效性。本文特别关注二进制神经网络(BNN),它在连接和逻辑函数中使用固定长度的比特来执行激励操作。利用这些特性,采用集成现场可编程门阵列(fpga)的硬件加速器来加速深度学习网络的推理,因为它能够最大限度地提高并行性和能源效率。这项工作将展示二进制频谱多样化统一神经进化架构(BiSUNA)算法如何在FPGA上执行训练和推理,而不需要梯度下降。源代码可以在github.com/rval735/bisunaocl找到
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Evolved Binary Neural Networks Through Harnessing FPGA Capabilities
The exponential progress of semiconductor tech-nologies has enabled the proliferation of deep learning as a prominent area of research, where neural networks have demon-strated its effectiveness to solve very hard multi dimensional problems. This paper focuses on one in particular, Binary Neural Networks (BNN), which use fixed length bits in its connections and logic functions to perform excitation operations. Exploiting those characteristics, hardware accelerators that integrate field-programmable gate arrays (FPGAs) have been adopted to hasten inference of deep learning networks, given its proficiency to maximize parallelism and energy efficiency. This work will show how the algorithm Binary Spectrum-diverse Unified Neuroevolution Architecture (BiSUNA) can perform training and inference on FPGA without the need of gradient descent. Source code can be found in github.com/rval735/bisunaocl
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