集成电路电超应力硬度估计的试验方法

RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294) Pub Date : 1997-09-15 DOI:10.1109/RADECS.1997.698882

P.K. Skorobogatov

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引用次数: 8

摘要

提出了一种估算集成电路电超应力硬度的测试方法。它建立在试验条件统一的基础上。该方法的优点是可以比较不同集成电路的EOS硬度。设计了一个专门的测试装置来估计不同ic对EOS的硬度，包括瞬态和永久影响。给出了数字双极IC和4K/spl次/1 CMOS RAM EOS硬度的实验数据，包括扰动、锁存和灾难性失效的影响。

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Test method for IC electrical overstress hardness estimation

A test method to estimate the electrical overstress (EOS) hardness of ICs is presented. It is based on unification of test conditions. The advantage of the method is the possibility it gives to compare the EOS hardness of different ICs. A specialized test installation has been designed to estimate the hardness of different ICs to EOS, including transient and permanent effects. Experimental data for digital bipolar IC and 4K/spl times/1 CMOS RAM EOS hardness are given including the effects of upset, latch-up and catastrophic failure.

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RADECS 97. Fourth European Conference on Radiation and its Effects on Components and Systems (Cat. No.97TH8294)

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