{"title":"一种提高半导体检测质量的超压检测系统","authors":"Hsin-Wen Ting, Chin-Ming Hsu","doi":"10.1109/ISIC.2012.6449700","DOIUrl":null,"url":null,"abstract":"The advance in semiconductor testing technology have improved the device quality and reliability. The testing strategy applied to dies at the wafer is definitely an important topic. The wafer-level testing scribes the wafer and selects the good dies for packaging. However, it has become increasingly difficult to identify outliers from the intrinsic distribution at test. The disagreeable overkill is also an issue addressed. In testing house, the common way to judge defects of integrated circuit (IC) is highly related to the empirical knowledge of test engineer. As a result, a systematic testing method is proposed to improve the testing quality in this paper. Applying the system to a real semiconductor product, about 50-% testing time reduction and 99-% testing correctness are achieved.","PeriodicalId":393653,"journal":{"name":"2012 International Conference on Information Security and Intelligent Control","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An overkill detection system for improving the testing quality of semiconductor\",\"authors\":\"Hsin-Wen Ting, Chin-Ming Hsu\",\"doi\":\"10.1109/ISIC.2012.6449700\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The advance in semiconductor testing technology have improved the device quality and reliability. The testing strategy applied to dies at the wafer is definitely an important topic. The wafer-level testing scribes the wafer and selects the good dies for packaging. However, it has become increasingly difficult to identify outliers from the intrinsic distribution at test. The disagreeable overkill is also an issue addressed. In testing house, the common way to judge defects of integrated circuit (IC) is highly related to the empirical knowledge of test engineer. As a result, a systematic testing method is proposed to improve the testing quality in this paper. Applying the system to a real semiconductor product, about 50-% testing time reduction and 99-% testing correctness are achieved.\",\"PeriodicalId\":393653,\"journal\":{\"name\":\"2012 International Conference on Information Security and Intelligent Control\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Conference on Information Security and Intelligent Control\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISIC.2012.6449700\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Conference on Information Security and Intelligent Control","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIC.2012.6449700","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An overkill detection system for improving the testing quality of semiconductor
The advance in semiconductor testing technology have improved the device quality and reliability. The testing strategy applied to dies at the wafer is definitely an important topic. The wafer-level testing scribes the wafer and selects the good dies for packaging. However, it has become increasingly difficult to identify outliers from the intrinsic distribution at test. The disagreeable overkill is also an issue addressed. In testing house, the common way to judge defects of integrated circuit (IC) is highly related to the empirical knowledge of test engineer. As a result, a systematic testing method is proposed to improve the testing quality in this paper. Applying the system to a real semiconductor product, about 50-% testing time reduction and 99-% testing correctness are achieved.