自定义掩码布局的自顶向下技术迁移方法

Z. Apanovich, A. Marchuk
{"title":"自定义掩码布局的自顶向下技术迁移方法","authors":"Z. Apanovich, A. Marchuk","doi":"10.1109/ICVD.1998.646577","DOIUrl":null,"url":null,"abstract":"The approach to technology migration presented in this paper is based on a compaction and rerouting strategy. It takes as input the full-chip mask layout hierarchical description (CIF format) and produces as output the mask layout in the target design rules. The applicability of the compaction and rerouting facilities, and the flexibility of the routing layers redistribution between different levels of mask layout hierarchy, are provided by a procedure for mask layout decomposition. The decomposition procedure takes as input any node of the mask layout hierarchical description and extracts the fragments which should be transformed by means of compaction. The size of the extracted fragments is controlled by decomposition parameters. Each extracted fragment is processed by a symbolisation procedure which provides resizing and regeneration of elementary objects such as transistors, contacts and wires. The target mask layout for each fragment is generated by a compaction procedure which is controlled by the constraints extracted during the symbolisation step. The resulting chip mask layout is generated by a routing procedure which is controlled by the data structures (netlist and floorplan) extracted during the decomposition step.","PeriodicalId":139023,"journal":{"name":"Proceedings Eleventh International Conference on VLSI Design","volume":"173 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Top-down approach to technology migration for full-custom mask layouts\",\"authors\":\"Z. Apanovich, A. Marchuk\",\"doi\":\"10.1109/ICVD.1998.646577\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The approach to technology migration presented in this paper is based on a compaction and rerouting strategy. It takes as input the full-chip mask layout hierarchical description (CIF format) and produces as output the mask layout in the target design rules. The applicability of the compaction and rerouting facilities, and the flexibility of the routing layers redistribution between different levels of mask layout hierarchy, are provided by a procedure for mask layout decomposition. The decomposition procedure takes as input any node of the mask layout hierarchical description and extracts the fragments which should be transformed by means of compaction. The size of the extracted fragments is controlled by decomposition parameters. Each extracted fragment is processed by a symbolisation procedure which provides resizing and regeneration of elementary objects such as transistors, contacts and wires. The target mask layout for each fragment is generated by a compaction procedure which is controlled by the constraints extracted during the symbolisation step. The resulting chip mask layout is generated by a routing procedure which is controlled by the data structures (netlist and floorplan) extracted during the decomposition step.\",\"PeriodicalId\":139023,\"journal\":{\"name\":\"Proceedings Eleventh International Conference on VLSI Design\",\"volume\":\"173 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-01-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Eleventh International Conference on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICVD.1998.646577\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Eleventh International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1998.646577","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

本文提出的技术迁移方法是基于压缩和重路由策略。它将全芯片掩码布局分层描述(CIF格式)作为输入,并产生目标设计规则中的掩码布局作为输出。通过掩码布局分解程序,提供了压缩和重路由功能的适用性和路由层在不同掩码布局层次之间重新分配的灵活性。分解过程以掩模布局分层描述的任意节点为输入,通过压缩提取需要变换的碎片。提取的碎片大小由分解参数控制。每个提取的片段都通过一个符号化程序进行处理,该程序提供了晶体管、触点和电线等基本对象的大小调整和再生。每个片段的目标掩码布局由一个压缩过程生成,该压缩过程由符号化步骤中提取的约束控制。由此产生的芯片掩码布局由路由过程生成,路由过程由分解步骤中提取的数据结构(网表和平面图)控制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Top-down approach to technology migration for full-custom mask layouts
The approach to technology migration presented in this paper is based on a compaction and rerouting strategy. It takes as input the full-chip mask layout hierarchical description (CIF format) and produces as output the mask layout in the target design rules. The applicability of the compaction and rerouting facilities, and the flexibility of the routing layers redistribution between different levels of mask layout hierarchy, are provided by a procedure for mask layout decomposition. The decomposition procedure takes as input any node of the mask layout hierarchical description and extracts the fragments which should be transformed by means of compaction. The size of the extracted fragments is controlled by decomposition parameters. Each extracted fragment is processed by a symbolisation procedure which provides resizing and regeneration of elementary objects such as transistors, contacts and wires. The target mask layout for each fragment is generated by a compaction procedure which is controlled by the constraints extracted during the symbolisation step. The resulting chip mask layout is generated by a routing procedure which is controlled by the data structures (netlist and floorplan) extracted during the decomposition step.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信