Moon Gi Seok, Chew Wye Chan, Wentong Cai, H. Sarjoughian, Daejin Park
{"title":"面向仿真加速的离散事件晶圆制造模型的运行时抽象级转换","authors":"Moon Gi Seok, Chew Wye Chan, Wentong Cai, H. Sarjoughian, Daejin Park","doi":"10.1145/3384441.3395982","DOIUrl":null,"url":null,"abstract":"Speeding up the simulation of discrete-event wafer fab models is essential because optimizing the scheduling and dispatching policies under various circumstances requires repeated evaluation of the decision candidates during parameter-space exploration. In this paper, we present a runtime abstraction-level conversion approach for discrete-event wafer-fabrication (wafer-fab) models to gain simulation speedup. During the simulation, if a machine group of the wafer fab models reaches a steady state, then the proposed approach attempts to substitute this group model with a mean-delay model (MDM) as a high abstraction level model. The MDM abstracts the detailed operations of the group's sub-component models into an average delay based on the queueing modeling, which can guarantee acceptable accuracy under steady state. The proposed abstraction-level converter (ALC) observes the queueing parameters of low-level groups to identify the convergence of each group's work-in-progress (WIP) level through a statistical test. When a group's WIP level is converged, the output-to-input couplings between the models are revised to change a wafer-lot process flow from the low-level group to a mean-delay model. When the ALC detects a divergence caused by a re-entrant flow or a machine-down, the high-level model is switched back to its corresponding low-level group model. The ALC then generates dummy wafer-lot events to synchronize the busyness of high-level steady state. The proposed method was applied to case studies of wafer-fab systems and achieves simulation speedup from 6.1 to 11.8 times with corresponding 2.5 to 5.9% degradation inaccuracy.","PeriodicalId":422248,"journal":{"name":"Proceedings of the 2020 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation","volume":"139 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Runtime Abstraction-Level Conversion of Discrete-Event Wafer-fabrication Models for Simulation Acceleration\",\"authors\":\"Moon Gi Seok, Chew Wye Chan, Wentong Cai, H. Sarjoughian, Daejin Park\",\"doi\":\"10.1145/3384441.3395982\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Speeding up the simulation of discrete-event wafer fab models is essential because optimizing the scheduling and dispatching policies under various circumstances requires repeated evaluation of the decision candidates during parameter-space exploration. In this paper, we present a runtime abstraction-level conversion approach for discrete-event wafer-fabrication (wafer-fab) models to gain simulation speedup. During the simulation, if a machine group of the wafer fab models reaches a steady state, then the proposed approach attempts to substitute this group model with a mean-delay model (MDM) as a high abstraction level model. The MDM abstracts the detailed operations of the group's sub-component models into an average delay based on the queueing modeling, which can guarantee acceptable accuracy under steady state. The proposed abstraction-level converter (ALC) observes the queueing parameters of low-level groups to identify the convergence of each group's work-in-progress (WIP) level through a statistical test. When a group's WIP level is converged, the output-to-input couplings between the models are revised to change a wafer-lot process flow from the low-level group to a mean-delay model. When the ALC detects a divergence caused by a re-entrant flow or a machine-down, the high-level model is switched back to its corresponding low-level group model. The ALC then generates dummy wafer-lot events to synchronize the busyness of high-level steady state. The proposed method was applied to case studies of wafer-fab systems and achieves simulation speedup from 6.1 to 11.8 times with corresponding 2.5 to 5.9% degradation inaccuracy.\",\"PeriodicalId\":422248,\"journal\":{\"name\":\"Proceedings of the 2020 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation\",\"volume\":\"139 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2020 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3384441.3395982\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2020 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3384441.3395982","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Runtime Abstraction-Level Conversion of Discrete-Event Wafer-fabrication Models for Simulation Acceleration
Speeding up the simulation of discrete-event wafer fab models is essential because optimizing the scheduling and dispatching policies under various circumstances requires repeated evaluation of the decision candidates during parameter-space exploration. In this paper, we present a runtime abstraction-level conversion approach for discrete-event wafer-fabrication (wafer-fab) models to gain simulation speedup. During the simulation, if a machine group of the wafer fab models reaches a steady state, then the proposed approach attempts to substitute this group model with a mean-delay model (MDM) as a high abstraction level model. The MDM abstracts the detailed operations of the group's sub-component models into an average delay based on the queueing modeling, which can guarantee acceptable accuracy under steady state. The proposed abstraction-level converter (ALC) observes the queueing parameters of low-level groups to identify the convergence of each group's work-in-progress (WIP) level through a statistical test. When a group's WIP level is converged, the output-to-input couplings between the models are revised to change a wafer-lot process flow from the low-level group to a mean-delay model. When the ALC detects a divergence caused by a re-entrant flow or a machine-down, the high-level model is switched back to its corresponding low-level group model. The ALC then generates dummy wafer-lot events to synchronize the busyness of high-level steady state. The proposed method was applied to case studies of wafer-fab systems and achieves simulation speedup from 6.1 to 11.8 times with corresponding 2.5 to 5.9% degradation inaccuracy.