FPGA上可参数化的浮点运算

Conference Record of the Thirty-Sixth Asilomar Conference on Signals, Systems and Computers, 2002. Pub Date : 2002-11-03 DOI:10.1109/ACSSC.2002.1196947

B. Lee, N. Burgess

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引用次数: 93

摘要

本文介绍了一组针对Xilinx VirtexII FPGA的IEEE 754风格浮点单元。利用该技术的特殊功能来生产优化的组件。给出了流水线设计，显示了/spl sim/ 100mhz单精度元件的延迟。非流水线参考设计也包括在内，以便将来进行比较。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Parameterisable floating-point operations on FPGA

The paper presents a group of IEEE 754-style floating-point units targeted at Xilinx VirtexII FPGA. Special features of the technology are taken advantage of to produce optimised components. Pipelined designs are given that show the latency of /spl sim/100 MHz single-precision components. Non-pipelined reference designs are included for future comparison purposes.

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Conference Record of the Thirty-Sixth Asilomar Conference on Signals, Systems and Computers, 2002.

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