{"title":"常规状态机","authors":"L. Thiele, J. Teich, Karsten Strehl","doi":"10.1080/01495730008945375","DOIUrl":null,"url":null,"abstract":"Abstract In this paper, we introduce a model called regular state machines (RSMs) that characterizes a class of state transition systems with regular transition behavior. It turns out that many process graph models such as synchronous dataflow graphs and Petri nets have a state transition system that may be described and analyzed in the RSM model. In particular, the proposed approach unifies methods known for the above-mentioned subclasses and yields new results concerning boundedness, deadlocks, scheduling, and formal verification.","PeriodicalId":406098,"journal":{"name":"Parallel Algorithms and Applications","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"REGULAR STATE MACHINES\",\"authors\":\"L. Thiele, J. Teich, Karsten Strehl\",\"doi\":\"10.1080/01495730008945375\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Abstract In this paper, we introduce a model called regular state machines (RSMs) that characterizes a class of state transition systems with regular transition behavior. It turns out that many process graph models such as synchronous dataflow graphs and Petri nets have a state transition system that may be described and analyzed in the RSM model. In particular, the proposed approach unifies methods known for the above-mentioned subclasses and yields new results concerning boundedness, deadlocks, scheduling, and formal verification.\",\"PeriodicalId\":406098,\"journal\":{\"name\":\"Parallel Algorithms and Applications\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Parallel Algorithms and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1080/01495730008945375\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Parallel Algorithms and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1080/01495730008945375","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Abstract In this paper, we introduce a model called regular state machines (RSMs) that characterizes a class of state transition systems with regular transition behavior. It turns out that many process graph models such as synchronous dataflow graphs and Petri nets have a state transition system that may be described and analyzed in the RSM model. In particular, the proposed approach unifies methods known for the above-mentioned subclasses and yields new results concerning boundedness, deadlocks, scheduling, and formal verification.
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