SPECTRUM:用于LTE基带处理的软件定义可预测多核架构

Vanchinathan Venkataramani, Aditi Kulkarni Mohite, T. Mitra, L. Peh
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引用次数: 8

摘要

长期演进(LTE)等无线通信标准正在迅速变化,以支持无线设备的高数据速率。物理层基带处理具有严格的实时期限,特别是在5G标准支持的下一代应用中。现有的基站收发器使用定制的数字信号处理(DSP)内核或固定功能的硬件加速器进行物理层基带处理。然而,这些方法会产生大量的非重复性工程成本,并且对于较新的标准或更新不灵活。软件可编程处理器提供了更多的适应性。然而,在共享内存多核架构(例如缓存和片上网络)上以合理的低功耗维持保证的最坏情况延迟和吞吐量是具有挑战性的,这些架构具有固有的不可预测的设计选择。我们提出SPECTRUM,这是一种可预测的软件定义多核架构,利用LTE基带处理的大规模并行性。重点是设计一种可扩展的轻量级硬件,它可以通过复杂的软件机制进行编程和定义。SPECTRUM采用了数百个轻量级的按顺序内核,增强了定制指令,提供可预测的时序,一个纯软件调度的片上网络,协调通信以避免任何争用,以及具有确定性访问延迟的每核软件控制的刮擦板内存。与Skylake-SP(平均功率215W)等多核架构相比,在高流量负载下丢包率为14%,256核SPECTRUM在明显低于24W的平均功率下定义为零丢包率。在基带处理方面,SPECTRUM功耗比C66x DSP内核+加速器平台低2.11倍。SPECTRUM在支持未来5G工作负载方面也处于有利地位。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SPECTRUM: a software defined predictable many-core architecture for LTE baseband processing
Wireless communication standards such as Long Term Evolution (LTE) are rapidly changing to support the high data rate of wireless devices. The physical layer baseband processing has strict real-time deadlines, especially in the next-generation applications enabled by the 5G standard. Existing base station transceivers utilize customized Digital Signal Processing (DSP) cores or fixed-function hardware accelerators for physical layer baseband processing. However, these approaches incur significant non-recurring engineering costs and are inflexible to newer standards or updates. Software programmable processors offer more adaptability. However, it is challenging to sustain guaranteed worst-case latency and throughput at reasonably low-power on shared-memory many-core architectures featuring inherently unpredictable design choices, such as caches and network-on chip. We propose SPECTRUM, a predictable software defined many-core architecture that exploits the massive parallelism of the LTE baseband processing. The focus is on designing a scalable lightweight hardware that can be programmed and defined by sophisticated software mechanisms. SPECTRUM employs hundreds of lightweight in-order cores augmented with custom instructions that provide predictable timing, a purely software-scheduled on-chip network that orchestrates the communication to avoid any contention and per-core software controlled scratchpad memory with deterministic access latency. Compared to a many-core architecture like Skylake-SP (average power 215W) that drops 14% packets at high traffic load, 256-core SPECTRUM by definition has zero packet drop rate at significantly lower average power of 24W. SPECTRUM consumes 2.11x lower power than C66x DSP cores+accelerator platform in baseband processing. SPECTRUM is also well-positioned to support future 5G workloads.
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