{"title":"嵌入式应用的数字控制","authors":"R. Leach","doi":"10.1109/SOUTHC.1996.535036","DOIUrl":null,"url":null,"abstract":"With the reduction of the cost and increase in performance of digital microprocessors, many system designers are performing both system control and signal processing with the same microcontroller. The author presents the PowerPC Architecture/sup TM/ which has many implementations with different pipeline depths, number of execution units, instruction timings, and instruction issue rates and protocols. The Power Architecture has two instruction classes: a floating point multiply-add instruction and a load/store with update. Examples are given using the MPC505, MPC602, MPC603, MPC604, MPC821, and MPC860 microprocessors.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Digital control for embedded applications\",\"authors\":\"R. Leach\",\"doi\":\"10.1109/SOUTHC.1996.535036\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the reduction of the cost and increase in performance of digital microprocessors, many system designers are performing both system control and signal processing with the same microcontroller. The author presents the PowerPC Architecture/sup TM/ which has many implementations with different pipeline depths, number of execution units, instruction timings, and instruction issue rates and protocols. The Power Architecture has two instruction classes: a floating point multiply-add instruction and a load/store with update. Examples are given using the MPC505, MPC602, MPC603, MPC604, MPC821, and MPC860 microprocessors.\",\"PeriodicalId\":199600,\"journal\":{\"name\":\"Southcon/96 Conference Record\",\"volume\":\"53 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Southcon/96 Conference Record\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOUTHC.1996.535036\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Southcon/96 Conference Record","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOUTHC.1996.535036","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
With the reduction of the cost and increase in performance of digital microprocessors, many system designers are performing both system control and signal processing with the same microcontroller. The author presents the PowerPC Architecture/sup TM/ which has many implementations with different pipeline depths, number of execution units, instruction timings, and instruction issue rates and protocols. The Power Architecture has two instruction classes: a floating point multiply-add instruction and a load/store with update. Examples are given using the MPC505, MPC602, MPC603, MPC604, MPC821, and MPC860 microprocessors.
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