{"title":"模拟VLSI的电流模式技术:技术和缺陷容限问题","authors":"A. Andreou","doi":"10.1109/DFTVS.1991.199942","DOIUrl":null,"url":null,"abstract":"Future large scale analog computational systems will have to cope with manufacturing defects and mismatch in individual components. The author argues that current-mode design techniques, and in particular minimal designs at the transistor level are consistent with future manufacturing requirements for wafer scale analog systems.<<ETX>>","PeriodicalId":440536,"journal":{"name":"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Current-mode techniques for analog VLSI: technology and defect tolerance issues\",\"authors\":\"A. Andreou\",\"doi\":\"10.1109/DFTVS.1991.199942\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Future large scale analog computational systems will have to cope with manufacturing defects and mismatch in individual components. The author argues that current-mode design techniques, and in particular minimal designs at the transistor level are consistent with future manufacturing requirements for wafer scale analog systems.<<ETX>>\",\"PeriodicalId\":440536,\"journal\":{\"name\":\"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1991.199942\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1991.199942","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Current-mode techniques for analog VLSI: technology and defect tolerance issues
Future large scale analog computational systems will have to cope with manufacturing defects and mismatch in individual components. The author argues that current-mode design techniques, and in particular minimal designs at the transistor level are consistent with future manufacturing requirements for wafer scale analog systems.<>