基于直方图测试方法的ΣΔ模数转换器校准

NORCHIP 2010 Pub Date : 2010-12-17 DOI:10.1109/NORCHIP.2010.5669459

A. Jalili, S. Sayedi, J. Wikner, N. Andersson, M. Vesterbacka

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引用次数: 4

摘要

在本文中，我们提出了一种用于sigma-delta模数转换器(ΣΔADC)的校准技术，其中使用高速，低分辨率闪存子adc。校准技术本身主要针对闪存子adc的校准，但我们也研究了校正如何依赖于ΣΔ调制器中应用校准信号的位置。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Calibration of ΣΔ analog-to-digital converters based on histogram test methods

In this paper we present a calibration technique for sigma-delta analog-to-digital converters (ΣΔADC) in which high-speed, low-resolution flash subADCs are used. The calibration technique as such is mainly targeting calibration of the flash subADC, but we also study how the correction depends on where in the ΣΔ modulator the calibration signals are applied.

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NORCHIP 2010

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