通过去同步降低亚vt电路的ir降

2012 IEEE Subthreshold Microelectronics Conference (SubVT) Pub Date : 2012-10-01 DOI:10.1109/SUBVT.2012.6404303

Andreas Karlsson, O. Andersson, J. Sparsø, J. Rodrigues

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引用次数: 6

摘要

本文提出用去同步的方法降低亚vt电路的红外降。通过一个案例研究简要地论证和分析了去同步的概念。对65nm CMOS系列的各种技术选项进行了广泛的红外降分析，展示了由于电源轨上的开关噪声如何降低噪声裕度。结果表明，与时钟设计相比，非同步实现可将电源轨道上的严重电压降降低约50%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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IR-drop reduction in sub-VT circuits by de-synchronization

This paper proposes IR-drop reduction of sub-VT circuits by de-synchronization. The de-synchronization concept is briefly demonstrated and analyzed by a case study. Extensive IR-drop analysis' of various technology options of a 65 nm CMOS family demonstrate how the noise margins are reduced due to switching noise on the supply rails. It is shown that a de-synchronized implementation reduces severe voltage drops on the supply rails by approximately 50%, compared to a clocked design.

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2012 IEEE Subthreshold Microelectronics Conference (SubVT)

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