射频电路中多层片上带通滤波器的设计与性能分析

Nagesh Deevi, N. Rao
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引用次数: 0

摘要

本文提出了采用VLSI多层设计思想的片上多层电感器。与标准三维电感相比,该多层电感的q系数提高了40%,电感系数提高了20%。多层电感在30 GHz时的最大质量因子(q因子)为32,在60 GHz时的电感为3.9nH,在61 GHz时的自谐振频率。利用三维仿真软件对多层电感进行了设计,并对多层电感的性能进行了参数化分析。该电感器的片上面积为100μmx100μm。采用设计的多层电感,设计了中心频率为36.5 GHz、带宽为4 GHz、负载Q值为9.125、分数带宽为10.9%的带通滤波器,适用于窄带工作。该滤波器的片上面积为150μmx150μ m,适用于射频电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and Performance Analysis of Multilayer On-Chip Band Pass Filter for RF Circuits
In this paper on-chip multi-layer inductor is proposed using VLSI multi-layer design concept. Proposed multi-layer inductor shows 40% improvement in terms of Q-factor and 20% improvement in terms of inductance, when compared with standard 3-D inductor. Multi-layer inductor has maximum Quality factor (Q-factor) of 32 at 30 GHz, 3.9nH of inductance at 60 GHz and self-resonant frequency at 61 GHz. Proposed Multi-layer inductor is designed using 3D simulation software tool and the performance is analysed by parametric variations in terms of width of conductor and spacing between conductors. This inductor occupies on- chip area of 100μmx100μm. Using designed multilayer inductor, band pass filter is proposed which has center frequency at 36.5 GHz, bandwidth of 4 GHz, loaded Q value of 9.125 and fractional bandwidth of 10.9% which is suitable for narrow band operations. On-chip area occupied by the filter is 150μmx150μ m which is suitable for RF circuits.
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