{"title":"32位可配置破解CPU的设计、分析与综合","authors":"Ruchita Kawle, S. Thakare","doi":"10.1109/RTEICT52294.2021.9573593","DOIUrl":null,"url":null,"abstract":"Designing of a configurable/modular processor based on HACK computer architecture is presented in the paper. The process confused in designing and building compound circuit of computer system that can perform real world computation is explained in the paper. The processor is build using bottom up approach; that is designing from basic components to major components like PC, ALU, ROM, RAM.A configurable processor signifies a processor that is configurable with respect to memory and components. Configurable memory denotes processor memory with 16 bit, 32 bit, 64 bit according to the requirement. And configurable components are in the sense that any specific individual component can be swapped with any other particular component according to the need and can analyze the performance change. The simulation of design is performed on Modelsim -Altera 10.1d (Quartus II 13.0sp1). The analysis and synthesis based on various parameters (i.e area/device utilization, Minimum propagation delay, Maximum frequency, Throughput, RTL schematic, Technology schematic) is done on Quartus II 13.0sp1.","PeriodicalId":191410,"journal":{"name":"2021 International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Designing, Analysis and Synthesis of 32-Bit Configurable Hack CPU\",\"authors\":\"Ruchita Kawle, S. Thakare\",\"doi\":\"10.1109/RTEICT52294.2021.9573593\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Designing of a configurable/modular processor based on HACK computer architecture is presented in the paper. The process confused in designing and building compound circuit of computer system that can perform real world computation is explained in the paper. The processor is build using bottom up approach; that is designing from basic components to major components like PC, ALU, ROM, RAM.A configurable processor signifies a processor that is configurable with respect to memory and components. Configurable memory denotes processor memory with 16 bit, 32 bit, 64 bit according to the requirement. And configurable components are in the sense that any specific individual component can be swapped with any other particular component according to the need and can analyze the performance change. The simulation of design is performed on Modelsim -Altera 10.1d (Quartus II 13.0sp1). The analysis and synthesis based on various parameters (i.e area/device utilization, Minimum propagation delay, Maximum frequency, Throughput, RTL schematic, Technology schematic) is done on Quartus II 13.0sp1.\",\"PeriodicalId\":191410,\"journal\":{\"name\":\"2021 International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT)\",\"volume\":\"65 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-08-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RTEICT52294.2021.9573593\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTEICT52294.2021.9573593","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文介绍了一种基于HACK计算机体系结构的可配置/模块化处理器的设计。本文阐述了可进行实际计算的计算机系统复合电路的设计和构造过程。处理器采用自底向上的方式构建;即从基本组件到主要组件的设计,如PC, ALU, ROM, RAM。可配置处理器表示相对于存储器和组件可配置的处理器。可配置内存是指根据需要配置16位、32位、64位的处理器内存。可配置组件是指任何特定的单个组件都可以根据需要与任何其他特定组件进行交换,并可以分析性能变化。设计仿真在Modelsim -Altera 10.1d (Quartus II 13.0sp1)上进行。基于各种参数(即面积/设备利用率、最小传播延迟、最大频率、吞吐量、RTL原理图、技术原理图)的分析和综合在Quartus II 13.0sp1上完成。
Designing, Analysis and Synthesis of 32-Bit Configurable Hack CPU
Designing of a configurable/modular processor based on HACK computer architecture is presented in the paper. The process confused in designing and building compound circuit of computer system that can perform real world computation is explained in the paper. The processor is build using bottom up approach; that is designing from basic components to major components like PC, ALU, ROM, RAM.A configurable processor signifies a processor that is configurable with respect to memory and components. Configurable memory denotes processor memory with 16 bit, 32 bit, 64 bit according to the requirement. And configurable components are in the sense that any specific individual component can be swapped with any other particular component according to the need and can analyze the performance change. The simulation of design is performed on Modelsim -Altera 10.1d (Quartus II 13.0sp1). The analysis and synthesis based on various parameters (i.e area/device utilization, Minimum propagation delay, Maximum frequency, Throughput, RTL schematic, Technology schematic) is done on Quartus II 13.0sp1.