{"title":"基于二维对数系统(2DLNS)的有限脉冲响应(FIR)滤波器设计","authors":"Mahzad Azarmehr, M. Ahmadi, G. Jullien","doi":"10.1109/NEWCAS.2011.5981213","DOIUrl":null,"url":null,"abstract":"The ever increasing demand for low power DSP applications has directed researchers to contemplate a variety of potential approaches in different contexts. In this regard, using some alternative number systems, which inherently are capable of reducing the hardware complexity, have been propounded. In this work, a 2DLNS-based platform for multiplication intensive DSP applications is presented. Implementing an FIR filter structure on this basis shows outstanding privilege to its binary counterpart in terms of VLSI area and power consumption.","PeriodicalId":271676,"journal":{"name":"2011 IEEE 9th International New Circuits and systems conference","volume":"70 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A two-dimensional logarithmic number system (2DLNS)-based Finite Impulse Response (FIR) filter design\",\"authors\":\"Mahzad Azarmehr, M. Ahmadi, G. Jullien\",\"doi\":\"10.1109/NEWCAS.2011.5981213\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The ever increasing demand for low power DSP applications has directed researchers to contemplate a variety of potential approaches in different contexts. In this regard, using some alternative number systems, which inherently are capable of reducing the hardware complexity, have been propounded. In this work, a 2DLNS-based platform for multiplication intensive DSP applications is presented. Implementing an FIR filter structure on this basis shows outstanding privilege to its binary counterpart in terms of VLSI area and power consumption.\",\"PeriodicalId\":271676,\"journal\":{\"name\":\"2011 IEEE 9th International New Circuits and systems conference\",\"volume\":\"70 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE 9th International New Circuits and systems conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NEWCAS.2011.5981213\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 9th International New Circuits and systems conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2011.5981213","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A two-dimensional logarithmic number system (2DLNS)-based Finite Impulse Response (FIR) filter design
The ever increasing demand for low power DSP applications has directed researchers to contemplate a variety of potential approaches in different contexts. In this regard, using some alternative number systems, which inherently are capable of reducing the hardware complexity, have been propounded. In this work, a 2DLNS-based platform for multiplication intensive DSP applications is presented. Implementing an FIR filter structure on this basis shows outstanding privilege to its binary counterpart in terms of VLSI area and power consumption.