SOI薄膜全耗尽高性能器件

T. MacElwee
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引用次数: 1

摘要

只提供摘要形式。SOI器件分为两类:厚膜部分耗尽(PD) mosfet和薄膜完全耗尽(FD) mosfet。利用二维数值模拟方法探讨了PD和FD mosfet的基本工作差异。从建模和实验数据中发现,FD mosfet可以显著降低二维短通道效应和PD mosfet中的扭结效应。描述了FD mosfet的显著设计特点。栅极长度短至400 nm的CMOS mosfet表现出非常好的饱和特性,电子迁移率约为550 cm/sup 2//V-s。栅极长度为1.2 μ m的环形振荡器显示出65 ps的逆变级延迟。这些环形振荡器还显示出与底层大块衬底非常良好的电容耦合。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SOI thin film fully depleted high performance devices
Summary form only given. SOI devices fall into two categories: thick-film partially depleted (PD) MOSFETs and thin-film fully depleted (FD) MOSFETs. The basic operation differences between PD and FD MOSFETs have been explored with the aid of two-dimensional numerical modeling. It is found from both modeling and experimental data that FD MOSFETs offer a significant reduction in the two-dimensional short-channel effects and the kink effect found in the PD MOSFETs. The salient design features of the FD MOSFETs are described. CMOS MOSFETs fabricated with gate lengths as short as 400 nm exhibit very good saturation characteristics with electron mobilities of approximately 550 cm/sup 2//V-s. Ring oscillators with gate lengths of 1.2 mu m have shown inverter stage delays of 65 ps. These ring oscillators also show very well-behaved capacitive coupling to the underlying bulk substrate.<>
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