{"title":"多晶硅接触双极晶体管栅极的最佳功率延迟产品。理论研究","authors":"S.-Y. Yung, D. Burk","doi":"10.1109/BIPOL.1988.51085","DOIUrl":null,"url":null,"abstract":"The best-case power-delay products for bipolar-transistor gates that have optimally designed transistors with polysilicon-contacted emitters, both with and without interfacial layers between the polysilicon and underlying emitter, are predicted. It is shown that gates that have one or the other of these contacted-resistors have comparable power-delay products. Because this modeling is very general, it is believed the results are applicable for arsenic as well as phosphorous-doped polysilicon-contacted bipolar transistors.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The best-case power-delay products for polysilicon-contacted bipolar-transistor gates. A theoretical study\",\"authors\":\"S.-Y. Yung, D. Burk\",\"doi\":\"10.1109/BIPOL.1988.51085\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The best-case power-delay products for bipolar-transistor gates that have optimally designed transistors with polysilicon-contacted emitters, both with and without interfacial layers between the polysilicon and underlying emitter, are predicted. It is shown that gates that have one or the other of these contacted-resistors have comparable power-delay products. Because this modeling is very general, it is believed the results are applicable for arsenic as well as phosphorous-doped polysilicon-contacted bipolar transistors.<<ETX>>\",\"PeriodicalId\":302949,\"journal\":{\"name\":\"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-09-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BIPOL.1988.51085\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.1988.51085","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The best-case power-delay products for polysilicon-contacted bipolar-transistor gates. A theoretical study
The best-case power-delay products for bipolar-transistor gates that have optimally designed transistors with polysilicon-contacted emitters, both with and without interfacial layers between the polysilicon and underlying emitter, are predicted. It is shown that gates that have one or the other of these contacted-resistors have comparable power-delay products. Because this modeling is very general, it is believed the results are applicable for arsenic as well as phosphorous-doped polysilicon-contacted bipolar transistors.<>
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