V. Ntinas, Dharmik Patel, Yongmin Wang, I. Messaris, V. Rana, S. Menzel, A. Ascoli, R. Tetzlaff
{"title":"一种用于高效电路仿真的简化可变感知VCM忆阻器模型","authors":"V. Ntinas, Dharmik Patel, Yongmin Wang, I. Messaris, V. Rana, S. Menzel, A. Ascoli, R. Tetzlaff","doi":"10.1109/SMACD58065.2023.10192107","DOIUrl":null,"url":null,"abstract":"Accurate and computationally cost-efficient models for fabricated memristor devices are essential for the design of future computers and AI-driven sensor-processor systems, especially for the simulation of large-scale circuits and systems. The variability-aware JART memristor model properly captures both the conduction mechanisms and the dynamical behavior of actual Valence Change Mechanism (VCM) memristors. However, the original JART VCM model incorporates an implicit description of the memristor current that constitutes a computationally heavy approach. Here, we aim to simplify the JART VCM model by replacing this implicit description with an explicit mathematical expression, leading to faster simulations and enabling deeper theoretical studies. The improvement achieved using the proposed model goes over x20 in simulation speed for increasing number of VCM devices, allowing for faster simulation of computing-inmemory and memristor-based AI systems.","PeriodicalId":239306,"journal":{"name":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation\",\"authors\":\"V. Ntinas, Dharmik Patel, Yongmin Wang, I. Messaris, V. Rana, S. Menzel, A. Ascoli, R. Tetzlaff\",\"doi\":\"10.1109/SMACD58065.2023.10192107\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Accurate and computationally cost-efficient models for fabricated memristor devices are essential for the design of future computers and AI-driven sensor-processor systems, especially for the simulation of large-scale circuits and systems. The variability-aware JART memristor model properly captures both the conduction mechanisms and the dynamical behavior of actual Valence Change Mechanism (VCM) memristors. However, the original JART VCM model incorporates an implicit description of the memristor current that constitutes a computationally heavy approach. Here, we aim to simplify the JART VCM model by replacing this implicit description with an explicit mathematical expression, leading to faster simulations and enabling deeper theoretical studies. The improvement achieved using the proposed model goes over x20 in simulation speed for increasing number of VCM devices, allowing for faster simulation of computing-inmemory and memristor-based AI systems.\",\"PeriodicalId\":239306,\"journal\":{\"name\":\"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"volume\":\"58 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMACD58065.2023.10192107\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMACD58065.2023.10192107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation
Accurate and computationally cost-efficient models for fabricated memristor devices are essential for the design of future computers and AI-driven sensor-processor systems, especially for the simulation of large-scale circuits and systems. The variability-aware JART memristor model properly captures both the conduction mechanisms and the dynamical behavior of actual Valence Change Mechanism (VCM) memristors. However, the original JART VCM model incorporates an implicit description of the memristor current that constitutes a computationally heavy approach. Here, we aim to simplify the JART VCM model by replacing this implicit description with an explicit mathematical expression, leading to faster simulations and enabling deeper theoretical studies. The improvement achieved using the proposed model goes over x20 in simulation speed for increasing number of VCM devices, allowing for faster simulation of computing-inmemory and memristor-based AI systems.