{"title":"IBM CMOS兼容光子学和行波电光调制器设计","authors":"D. Gill","doi":"10.1109/SLIP.2013.6681677","DOIUrl":null,"url":null,"abstract":"Summary form only given. This talk will give a general overview of the IBM Silicon Photonics program and specifically discuss CMOS compatible traveling wave electro-optic modulator design. A Non-Return-to-Zero Transmitter-link penalty calculation protocol for Mach-Zehnder Interferometric modulators based on the phase shifter efficiency-loss figure-of-merit will be presented. Our Transmitter-link penalty analysis protocol allows one to easily assess an expected penalty estimation from only the RF Vpp drive, modulator efficiency loss FOM, and the assumption that transmitter bandwidth is sufficient to support the link data rate, which allows system designers to better understand how device-level performance metrics impact system link budget.","PeriodicalId":385305,"journal":{"name":"2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"IBM CMOS compatible photonics and traveling wave electro-optic modulator design\",\"authors\":\"D. Gill\",\"doi\":\"10.1109/SLIP.2013.6681677\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. This talk will give a general overview of the IBM Silicon Photonics program and specifically discuss CMOS compatible traveling wave electro-optic modulator design. A Non-Return-to-Zero Transmitter-link penalty calculation protocol for Mach-Zehnder Interferometric modulators based on the phase shifter efficiency-loss figure-of-merit will be presented. Our Transmitter-link penalty analysis protocol allows one to easily assess an expected penalty estimation from only the RF Vpp drive, modulator efficiency loss FOM, and the assumption that transmitter bandwidth is sufficient to support the link data rate, which allows system designers to better understand how device-level performance metrics impact system link budget.\",\"PeriodicalId\":385305,\"journal\":{\"name\":\"2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SLIP.2013.6681677\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SLIP.2013.6681677","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
IBM CMOS compatible photonics and traveling wave electro-optic modulator design
Summary form only given. This talk will give a general overview of the IBM Silicon Photonics program and specifically discuss CMOS compatible traveling wave electro-optic modulator design. A Non-Return-to-Zero Transmitter-link penalty calculation protocol for Mach-Zehnder Interferometric modulators based on the phase shifter efficiency-loss figure-of-merit will be presented. Our Transmitter-link penalty analysis protocol allows one to easily assess an expected penalty estimation from only the RF Vpp drive, modulator efficiency loss FOM, and the assumption that transmitter bandwidth is sufficient to support the link data rate, which allows system designers to better understand how device-level performance metrics impact system link budget.