{"title":"一种新型非晶硅薄膜晶体管","authors":"Y. Byun, W. den Beer, Moshi Yang, T. Gu","doi":"10.1109/DRC.1995.496311","DOIUrl":null,"url":null,"abstract":"In AMLCD (Active Matrix Liquid Crystal display) applications minimizing Cgs, the parasitic capacitance between gate and source of a-Si TFT, reduces flicker, image retention and gray scale nonuniformity and makes it possible to further increase display size and resolution. Cgs is generally minimized by shrinking the device size, e.g. by using ion doping for the n/sup +/ contact formation in a self-aligned trilayer type TFT. We present a TFT with a novel geometry to reduce Cgs and photosensitivity.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"161 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A novel amorphous silicon thin film transistor for AMLCDs\",\"authors\":\"Y. Byun, W. den Beer, Moshi Yang, T. Gu\",\"doi\":\"10.1109/DRC.1995.496311\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In AMLCD (Active Matrix Liquid Crystal display) applications minimizing Cgs, the parasitic capacitance between gate and source of a-Si TFT, reduces flicker, image retention and gray scale nonuniformity and makes it possible to further increase display size and resolution. Cgs is generally minimized by shrinking the device size, e.g. by using ion doping for the n/sup +/ contact formation in a self-aligned trilayer type TFT. We present a TFT with a novel geometry to reduce Cgs and photosensitivity.\",\"PeriodicalId\":326645,\"journal\":{\"name\":\"1995 53rd Annual Device Research Conference Digest\",\"volume\":\"161 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 53rd Annual Device Research Conference Digest\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.1995.496311\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 53rd Annual Device Research Conference Digest","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.1995.496311","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel amorphous silicon thin film transistor for AMLCDs
In AMLCD (Active Matrix Liquid Crystal display) applications minimizing Cgs, the parasitic capacitance between gate and source of a-Si TFT, reduces flicker, image retention and gray scale nonuniformity and makes it possible to further increase display size and resolution. Cgs is generally minimized by shrinking the device size, e.g. by using ion doping for the n/sup +/ contact formation in a self-aligned trilayer type TFT. We present a TFT with a novel geometry to reduce Cgs and photosensitivity.