J. Tu, Meisong Zheng, Zilong Wang, Lijian Li, Junye Wang
{"title":"嵌入式系统的聚类多字典代码压缩","authors":"J. Tu, Meisong Zheng, Zilong Wang, Lijian Li, Junye Wang","doi":"10.1109/DCC.2015.6","DOIUrl":null,"url":null,"abstract":"A novel clustered multi-dictionary code compression method is proposed to effectively reduce the memory size which program code stored. According to the repeat times of distinct codes, the code set is clustered into several clusters. Each cluster is compressed with different dictionary and the codeword length is the same for the same dictionary. Shorter codeword is used for the dictionary whose size is smaller. Experimental results of MiBench benchmark compiled for ARM and MIPS show that the compression efficiency of this method is superior to the traditional multi-level dictionary-based code compression. The latency of instruction fetch is almost not increased, decode logic overhead is tiny and acceptable. Furthermore, the storage-bandwidth is increased.","PeriodicalId":313156,"journal":{"name":"2015 Data Compression Conference","volume":"22 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Clustered Multi-dictionary Code Compression for Embedded Systems\",\"authors\":\"J. Tu, Meisong Zheng, Zilong Wang, Lijian Li, Junye Wang\",\"doi\":\"10.1109/DCC.2015.6\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel clustered multi-dictionary code compression method is proposed to effectively reduce the memory size which program code stored. According to the repeat times of distinct codes, the code set is clustered into several clusters. Each cluster is compressed with different dictionary and the codeword length is the same for the same dictionary. Shorter codeword is used for the dictionary whose size is smaller. Experimental results of MiBench benchmark compiled for ARM and MIPS show that the compression efficiency of this method is superior to the traditional multi-level dictionary-based code compression. The latency of instruction fetch is almost not increased, decode logic overhead is tiny and acceptable. Furthermore, the storage-bandwidth is increased.\",\"PeriodicalId\":313156,\"journal\":{\"name\":\"2015 Data Compression Conference\",\"volume\":\"22 2\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-04-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 Data Compression Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCC.2015.6\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 Data Compression Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCC.2015.6","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Clustered Multi-dictionary Code Compression for Embedded Systems
A novel clustered multi-dictionary code compression method is proposed to effectively reduce the memory size which program code stored. According to the repeat times of distinct codes, the code set is clustered into several clusters. Each cluster is compressed with different dictionary and the codeword length is the same for the same dictionary. Shorter codeword is used for the dictionary whose size is smaller. Experimental results of MiBench benchmark compiled for ARM and MIPS show that the compression efficiency of this method is superior to the traditional multi-level dictionary-based code compression. The latency of instruction fetch is almost not increased, decode logic overhead is tiny and acceptable. Furthermore, the storage-bandwidth is increased.