自顶向下系统设计的嵌入式引脚分配

Proceedings EURO-DAC '92: European Design Automation Conference Pub Date : 1992-11-01 DOI:10.1109/EURDAC.1992.246241

Thomas Pförtner, S. Kiefl, R. Dachauer

{"title":"自顶向下系统设计的嵌入式引脚分配","authors":"Thomas Pförtner, S. Kiefl, R. Dachauer","doi":"10.1109/EURDAC.1992.246241","DOIUrl":null,"url":null,"abstract":"The authors present a technique of employing pin assignment to improve the physical design of printed circuit boards. The technique is based on all pins of ASICs, and reduces wire lengths and via count. Design time is reduced by automation and a top-down design procedure. An algorithm for the pin assignment problem is presented, and the combination of pin assignment with global routing is described.<<ETX>>","PeriodicalId":218056,"journal":{"name":"Proceedings EURO-DAC '92: European Design Automation Conference","volume":"52 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Embedded pin assignment for top down system design\",\"authors\":\"Thomas Pförtner, S. Kiefl, R. Dachauer\",\"doi\":\"10.1109/EURDAC.1992.246241\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors present a technique of employing pin assignment to improve the physical design of printed circuit boards. The technique is based on all pins of ASICs, and reduces wire lengths and via count. Design time is reduced by automation and a top-down design procedure. An algorithm for the pin assignment problem is presented, and the combination of pin assignment with global routing is described.<<ETX>>\",\"PeriodicalId\":218056,\"journal\":{\"name\":\"Proceedings EURO-DAC '92: European Design Automation Conference\",\"volume\":\"52 2\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings EURO-DAC '92: European Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EURDAC.1992.246241\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings EURO-DAC '92: European Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURDAC.1992.246241","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 4

摘要

提出了一种利用引脚分配技术改进印刷电路板物理设计的方法。该技术基于asic的所有引脚，减少了导线长度和通孔数。自动化和自顶向下的设计过程减少了设计时间。提出了一种引脚分配问题的算法，并将引脚分配与全局路由相结合。

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Embedded pin assignment for top down system design

The authors present a technique of employing pin assignment to improve the physical design of printed circuit boards. The technique is based on all pins of ASICs, and reduces wire lengths and via count. Design time is reduced by automation and a top-down design procedure. An algorithm for the pin assignment problem is presented, and the combination of pin assignment with global routing is described.<>

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Proceedings EURO-DAC '92: European Design Automation Conference

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