{"title":"射频功率GaN HEMT器件的电学和热分析及布局优化","authors":"Chenyu Wang, Yanpeng Xie, Qianqian Chen, Qiang Chen","doi":"10.1109/icet55676.2022.9824047","DOIUrl":null,"url":null,"abstract":"In this paper, we simulated and investigated the electrical and thermal performances of AlGaN/GaN-on-SiC RF-power HEMT devices for the device structures with different TSV placement locations and different gate finger widths. It is found that improved electrical and thermal performance in ISV device structures is mainly due to the increased source area and not by the introduction of TSV into the source region inside active area. From findings of 3D FEM thermal simulation, we proposed a layout optimization method to have a good balance between device performance and device area (cost). The proposed method can improve the average temperature and thus performance of OSV device structures to be very close to what ISV device structures could have, while still keep to some extent the advantage of lower device area (cost) which OSV device structures have.","PeriodicalId":166358,"journal":{"name":"2022 IEEE 5th International Conference on Electronics Technology (ICET)","volume":"283 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Electrical and Thermal Analyses of RF-Power GaN HEMT Devices and Layout Optimization\",\"authors\":\"Chenyu Wang, Yanpeng Xie, Qianqian Chen, Qiang Chen\",\"doi\":\"10.1109/icet55676.2022.9824047\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we simulated and investigated the electrical and thermal performances of AlGaN/GaN-on-SiC RF-power HEMT devices for the device structures with different TSV placement locations and different gate finger widths. It is found that improved electrical and thermal performance in ISV device structures is mainly due to the increased source area and not by the introduction of TSV into the source region inside active area. From findings of 3D FEM thermal simulation, we proposed a layout optimization method to have a good balance between device performance and device area (cost). The proposed method can improve the average temperature and thus performance of OSV device structures to be very close to what ISV device structures could have, while still keep to some extent the advantage of lower device area (cost) which OSV device structures have.\",\"PeriodicalId\":166358,\"journal\":{\"name\":\"2022 IEEE 5th International Conference on Electronics Technology (ICET)\",\"volume\":\"283 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 5th International Conference on Electronics Technology (ICET)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/icet55676.2022.9824047\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 5th International Conference on Electronics Technology (ICET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icet55676.2022.9824047","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Electrical and Thermal Analyses of RF-Power GaN HEMT Devices and Layout Optimization
In this paper, we simulated and investigated the electrical and thermal performances of AlGaN/GaN-on-SiC RF-power HEMT devices for the device structures with different TSV placement locations and different gate finger widths. It is found that improved electrical and thermal performance in ISV device structures is mainly due to the increased source area and not by the introduction of TSV into the source region inside active area. From findings of 3D FEM thermal simulation, we proposed a layout optimization method to have a good balance between device performance and device area (cost). The proposed method can improve the average temperature and thus performance of OSV device structures to be very close to what ISV device structures could have, while still keep to some extent the advantage of lower device area (cost) which OSV device structures have.