{"title":"具有源退化和并联串联反馈的超宽带低噪声放大器","authors":"E. V. Balashov, Alexander S. Korotkov","doi":"10.1109/ECCSC.2008.4611652","DOIUrl":null,"url":null,"abstract":"In this paper the new type of UWB LNA is presented. The amplifier has a novel feedback topology and load circuit that allows the designer to obtain high voltage gain and matching in the wide frequency range from 3.1 GHz to 10.6 GHz without cascading, current reuse technique and without an additional matching circuit. The key point of the amplifier is the source degeneration with resistive shunt series feedback and the load circuit based on combined parallel-series resonance circuit. The voltage gain of the amplifier is 11 dB, the matching is better than -10 dB, the noise figure lies between 3.2 and 4 dB in the whole frequency range. The value of CP1dB is -15 dB at the frequency near the amplitude response maximum 7.6 GHz. The amplifier consumes the power of 11.5 mW from the voltage supply 1.8 V. These characteristics are obtained by simulation of the amplifier using Virtuoso custom design platform, Cadence Design Systems, using 0.18 um CMOS parameters.","PeriodicalId":249205,"journal":{"name":"2008 4th European Conference on Circuits and Systems for Communications","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Ultra wideband low noise amplifier with source degeneration and shunt series fedback\",\"authors\":\"E. V. Balashov, Alexander S. Korotkov\",\"doi\":\"10.1109/ECCSC.2008.4611652\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper the new type of UWB LNA is presented. The amplifier has a novel feedback topology and load circuit that allows the designer to obtain high voltage gain and matching in the wide frequency range from 3.1 GHz to 10.6 GHz without cascading, current reuse technique and without an additional matching circuit. The key point of the amplifier is the source degeneration with resistive shunt series feedback and the load circuit based on combined parallel-series resonance circuit. The voltage gain of the amplifier is 11 dB, the matching is better than -10 dB, the noise figure lies between 3.2 and 4 dB in the whole frequency range. The value of CP1dB is -15 dB at the frequency near the amplitude response maximum 7.6 GHz. The amplifier consumes the power of 11.5 mW from the voltage supply 1.8 V. These characteristics are obtained by simulation of the amplifier using Virtuoso custom design platform, Cadence Design Systems, using 0.18 um CMOS parameters.\",\"PeriodicalId\":249205,\"journal\":{\"name\":\"2008 4th European Conference on Circuits and Systems for Communications\",\"volume\":\"44 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 4th European Conference on Circuits and Systems for Communications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCSC.2008.4611652\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 4th European Conference on Circuits and Systems for Communications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCSC.2008.4611652","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ultra wideband low noise amplifier with source degeneration and shunt series fedback
In this paper the new type of UWB LNA is presented. The amplifier has a novel feedback topology and load circuit that allows the designer to obtain high voltage gain and matching in the wide frequency range from 3.1 GHz to 10.6 GHz without cascading, current reuse technique and without an additional matching circuit. The key point of the amplifier is the source degeneration with resistive shunt series feedback and the load circuit based on combined parallel-series resonance circuit. The voltage gain of the amplifier is 11 dB, the matching is better than -10 dB, the noise figure lies between 3.2 and 4 dB in the whole frequency range. The value of CP1dB is -15 dB at the frequency near the amplitude response maximum 7.6 GHz. The amplifier consumes the power of 11.5 mW from the voltage supply 1.8 V. These characteristics are obtained by simulation of the amplifier using Virtuoso custom design platform, Cadence Design Systems, using 0.18 um CMOS parameters.
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