{"title":"基于45纳米技术的XOR和XNOR电路的FINFET通管设计与分析","authors":"N. Yadav, S. Khandelwal, S. Akashe","doi":"10.1109/ICCCCM.2013.6648909","DOIUrl":null,"url":null,"abstract":"The conventional single-gate MOSFETs faces great challenges in scaling down of devices due to the severe short-channel effects that reason an exponential gain in the leakage current. To minimize the short channel effect Double-gate FinFET can be used in place of conventional MOSFET circuits because of the self-alignment of the two gates. Design of XOR and XNOR circuits is suggested to improve the speed and power of these circuits and is basic building block of many arithmetic circuits. This paper compares and evaluates the performance of various designs of pass transistor based XOR and XNOR circuits. This paper demonstrates comparative performance study of high speed, low power and low voltage on XOR and XNOR digital circuit. The performances of XOR and XNOR circuits are based on CADANCE VIRTUOSO tool at 45 nm by applying voltage supply 0.7 voltages and the temperate is 27°C. Simulation results reveal low power, delay, power, delay product (PDP), average dynamic power consumption, energy delay product (EDP).","PeriodicalId":230396,"journal":{"name":"2013 International Conference on Control, Computing, Communication and Materials (ICCCCM)","volume":"57 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"Design and analysis of FINFET pass transistor based XOR and XNOR circuits at 45 nm technology\",\"authors\":\"N. Yadav, S. Khandelwal, S. Akashe\",\"doi\":\"10.1109/ICCCCM.2013.6648909\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The conventional single-gate MOSFETs faces great challenges in scaling down of devices due to the severe short-channel effects that reason an exponential gain in the leakage current. To minimize the short channel effect Double-gate FinFET can be used in place of conventional MOSFET circuits because of the self-alignment of the two gates. Design of XOR and XNOR circuits is suggested to improve the speed and power of these circuits and is basic building block of many arithmetic circuits. This paper compares and evaluates the performance of various designs of pass transistor based XOR and XNOR circuits. This paper demonstrates comparative performance study of high speed, low power and low voltage on XOR and XNOR digital circuit. The performances of XOR and XNOR circuits are based on CADANCE VIRTUOSO tool at 45 nm by applying voltage supply 0.7 voltages and the temperate is 27°C. Simulation results reveal low power, delay, power, delay product (PDP), average dynamic power consumption, energy delay product (EDP).\",\"PeriodicalId\":230396,\"journal\":{\"name\":\"2013 International Conference on Control, Computing, Communication and Materials (ICCCCM)\",\"volume\":\"57 1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 International Conference on Control, Computing, Communication and Materials (ICCCCM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCCCM.2013.6648909\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 International Conference on Control, Computing, Communication and Materials (ICCCCM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCCM.2013.6648909","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and analysis of FINFET pass transistor based XOR and XNOR circuits at 45 nm technology
The conventional single-gate MOSFETs faces great challenges in scaling down of devices due to the severe short-channel effects that reason an exponential gain in the leakage current. To minimize the short channel effect Double-gate FinFET can be used in place of conventional MOSFET circuits because of the self-alignment of the two gates. Design of XOR and XNOR circuits is suggested to improve the speed and power of these circuits and is basic building block of many arithmetic circuits. This paper compares and evaluates the performance of various designs of pass transistor based XOR and XNOR circuits. This paper demonstrates comparative performance study of high speed, low power and low voltage on XOR and XNOR digital circuit. The performances of XOR and XNOR circuits are based on CADANCE VIRTUOSO tool at 45 nm by applying voltage supply 0.7 voltages and the temperate is 27°C. Simulation results reveal low power, delay, power, delay product (PDP), average dynamic power consumption, energy delay product (EDP).