一种VHDL-AMS压控振荡器合成方法

Sonia Eloued, J. Slama
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引用次数: 0

摘要

本文提出了一种基于自顶向下设计方法的基于行为建模的压控振荡器设计方法。我们的策略包括创建一种合成技术,将压控振荡器VHDL-AMS描述转换为匹配良好的晶体管水平。该方法使用了多种计算机辅助设计工具,并进行了大量的晶体管级仿真,以验证所提出模型的有效性。该方法旨在指导设计人员完成从规格到晶体管级参数尺寸的项目过程,而不需要专业知识。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A VHDL-AMS voltage controlled oscillator synthesis approach
This paper presents an approach based on a top-down design methodology that is used to design a voltage-controlled oscillator based on behavioral modeling.Our strategy consists of creating a synthesis technique traducing a voltage-controlled oscillator VHDL-AMS description into a well-matched transistor level.The methodology uses several computer-aided design tools and a lot of transistor-level simulations are achieved to validate the efficiency of the proposed models.This method aims to guide designer through the project process from specification to transistor level parameters dimensioning without an expertise necessity.
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