S. Pornpromlikit, H. Dabag, B. Hanafi, Joohwa Kim, L. Larson, J. Buckwalter, P. Asbeck
{"title":"用45纳米CMOS场效应管实现的q波段放大器","authors":"S. Pornpromlikit, H. Dabag, B. Hanafi, Joohwa Kim, L. Larson, J. Buckwalter, P. Asbeck","doi":"10.1109/CSICS.2011.6062465","DOIUrl":null,"url":null,"abstract":"A stacked FET, single-stage 45-GHz (Q-band) CMOS power amplifier (PA) is presented. The design stacked three FETs to avoid breakdown while allowing a high supply voltage. The IC was implemented in a 45-nm CMOS SOI process. The saturated output power exceeds 18 dBm from a 4-V supply. Integrated shielded coplanar waveguide (CPW) transmission lines as well as metal finger capacitors were used for input and output matching. The amplifier occupies an area of 450x500 im² including pads, while achieving a maximum power-added-efficiency (PAE) above 20%.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"53","resultStr":"{\"title\":\"A Q-Band Amplifier Implemented with Stacked 45-nm CMOS FETs\",\"authors\":\"S. Pornpromlikit, H. Dabag, B. Hanafi, Joohwa Kim, L. Larson, J. Buckwalter, P. Asbeck\",\"doi\":\"10.1109/CSICS.2011.6062465\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A stacked FET, single-stage 45-GHz (Q-band) CMOS power amplifier (PA) is presented. The design stacked three FETs to avoid breakdown while allowing a high supply voltage. The IC was implemented in a 45-nm CMOS SOI process. The saturated output power exceeds 18 dBm from a 4-V supply. Integrated shielded coplanar waveguide (CPW) transmission lines as well as metal finger capacitors were used for input and output matching. The amplifier occupies an area of 450x500 im² including pads, while achieving a maximum power-added-efficiency (PAE) above 20%.\",\"PeriodicalId\":275064,\"journal\":{\"name\":\"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"53\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2011.6062465\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2011.6062465","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Q-Band Amplifier Implemented with Stacked 45-nm CMOS FETs
A stacked FET, single-stage 45-GHz (Q-band) CMOS power amplifier (PA) is presented. The design stacked three FETs to avoid breakdown while allowing a high supply voltage. The IC was implemented in a 45-nm CMOS SOI process. The saturated output power exceeds 18 dBm from a 4-V supply. Integrated shielded coplanar waveguide (CPW) transmission lines as well as metal finger capacitors were used for input and output matching. The amplifier occupies an area of 450x500 im² including pads, while achieving a maximum power-added-efficiency (PAE) above 20%.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
