{"title":"设计重用和为重用而设计,以HDSL2为例","authors":"T. Ahonen, J. Nurmi","doi":"10.1109/ISSOC.2004.1411165","DOIUrl":null,"url":null,"abstract":"Design reuse offers time-to-market reduction through exploitation of previously created components and subsystems. Wide adoption of design reuse lays the foundation for the development of system-level design methodologies. The study described here focused on the design for reuse of an HDSL2 transceiver SoC and its components. The problems faced when trying to reuse old macro components are discussed and the disciplines adopted to ensure reusability of the created intellectual property (IP) are summarized. The disciplines have proven effective, as the Viterbi decoder component was modified for reuse in an asynchronous environment in another university without any support from the original designer.","PeriodicalId":268122,"journal":{"name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","volume":"2 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design reuse and design for reuse, a case study on HDSL2\",\"authors\":\"T. Ahonen, J. Nurmi\",\"doi\":\"10.1109/ISSOC.2004.1411165\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design reuse offers time-to-market reduction through exploitation of previously created components and subsystems. Wide adoption of design reuse lays the foundation for the development of system-level design methodologies. The study described here focused on the design for reuse of an HDSL2 transceiver SoC and its components. The problems faced when trying to reuse old macro components are discussed and the disciplines adopted to ensure reusability of the created intellectual property (IP) are summarized. The disciplines have proven effective, as the Viterbi decoder component was modified for reuse in an asynchronous environment in another university without any support from the original designer.\",\"PeriodicalId\":268122,\"journal\":{\"name\":\"2004 International Symposium on System-on-Chip, 2004. Proceedings.\",\"volume\":\"2 2\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 International Symposium on System-on-Chip, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSOC.2004.1411165\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSOC.2004.1411165","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design reuse and design for reuse, a case study on HDSL2
Design reuse offers time-to-market reduction through exploitation of previously created components and subsystems. Wide adoption of design reuse lays the foundation for the development of system-level design methodologies. The study described here focused on the design for reuse of an HDSL2 transceiver SoC and its components. The problems faced when trying to reuse old macro components are discussed and the disciplines adopted to ensure reusability of the created intellectual property (IP) are summarized. The disciplines have proven effective, as the Viterbi decoder component was modified for reuse in an asynchronous environment in another university without any support from the original designer.