{"title":"公共领域VLSIC设计套件的优缺点","authors":"H. Abdel-Aty-Zohdy","doi":"10.1109/MSE.1997.612522","DOIUrl":null,"url":null,"abstract":"Computer-Aided Design (CAD) tools play an essential role in modern microelectronics. A comparison between two of the available CAD tool suites, OCTTOOLS and OASIS, is presented along with detailed description of their features and advantages. These tools utilize full-custom or the standard cells semi-custom approaches. This paper is intended to facilitate proper choice of the tools for best VLSIC designs. At the Microelectronics System Design Lab (MSDL), Oakland University, several VLSIC chips have been designed and implemented based on: the ease of transfer among the various hierarchical design levels of the OCTTOOLS and the efficient compaction available in OASIS. An example of a six-bit multiplier is presented to illustrate the design and implementation. The pros and limitations of each tool address: specification language, logic and switch level simulations, placement and routing, design verification and testability, as well as compaction.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Pros and cons of public domain VLSIC design suites\",\"authors\":\"H. Abdel-Aty-Zohdy\",\"doi\":\"10.1109/MSE.1997.612522\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Computer-Aided Design (CAD) tools play an essential role in modern microelectronics. A comparison between two of the available CAD tool suites, OCTTOOLS and OASIS, is presented along with detailed description of their features and advantages. These tools utilize full-custom or the standard cells semi-custom approaches. This paper is intended to facilitate proper choice of the tools for best VLSIC designs. At the Microelectronics System Design Lab (MSDL), Oakland University, several VLSIC chips have been designed and implemented based on: the ease of transfer among the various hierarchical design levels of the OCTTOOLS and the efficient compaction available in OASIS. An example of a six-bit multiplier is presented to illustrate the design and implementation. The pros and limitations of each tool address: specification language, logic and switch level simulations, placement and routing, design verification and testability, as well as compaction.\",\"PeriodicalId\":120048,\"journal\":{\"name\":\"Proceedings of International Conference on Microelectronic Systems Education\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-07-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of International Conference on Microelectronic Systems Education\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MSE.1997.612522\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Conference on Microelectronic Systems Education","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.1997.612522","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Pros and cons of public domain VLSIC design suites
Computer-Aided Design (CAD) tools play an essential role in modern microelectronics. A comparison between two of the available CAD tool suites, OCTTOOLS and OASIS, is presented along with detailed description of their features and advantages. These tools utilize full-custom or the standard cells semi-custom approaches. This paper is intended to facilitate proper choice of the tools for best VLSIC designs. At the Microelectronics System Design Lab (MSDL), Oakland University, several VLSIC chips have been designed and implemented based on: the ease of transfer among the various hierarchical design levels of the OCTTOOLS and the efficient compaction available in OASIS. An example of a six-bit multiplier is presented to illustrate the design and implementation. The pros and limitations of each tool address: specification language, logic and switch level simulations, placement and routing, design verification and testability, as well as compaction.