{"title":"用于系统级应用程序分析的方法","authors":"H. Thomas, J. Diguet, J. Philippe","doi":"10.1109/SIPS.1999.822325","DOIUrl":null,"url":null,"abstract":"This paper comes within the framework in the application-architecture matching. The proposed methodology covers the upper part of the codesign flow which is located before the partitioning step. The issue is to provide the designer and to the partitioning step with useful information in order to design an ad hoc architecture. Also, the estimations are computed without knowledge of the implementation. The optimisation potential existing between the function are taking into account to obtain a global and dynamic cost of the application.","PeriodicalId":275030,"journal":{"name":"1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)","volume":"2017 47","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A methodology for an application profiling at system level\",\"authors\":\"H. Thomas, J. Diguet, J. Philippe\",\"doi\":\"10.1109/SIPS.1999.822325\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper comes within the framework in the application-architecture matching. The proposed methodology covers the upper part of the codesign flow which is located before the partitioning step. The issue is to provide the designer and to the partitioning step with useful information in order to design an ad hoc architecture. Also, the estimations are computed without knowledge of the implementation. The optimisation potential existing between the function are taking into account to obtain a global and dynamic cost of the application.\",\"PeriodicalId\":275030,\"journal\":{\"name\":\"1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)\",\"volume\":\"2017 47\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIPS.1999.822325\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.1999.822325","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A methodology for an application profiling at system level
This paper comes within the framework in the application-architecture matching. The proposed methodology covers the upper part of the codesign flow which is located before the partitioning step. The issue is to provide the designer and to the partitioning step with useful information in order to design an ad hoc architecture. Also, the estimations are computed without knowledge of the implementation. The optimisation potential existing between the function are taking into account to obtain a global and dynamic cost of the application.