快速确定ILD Vbd失败根本原因的方法

2008 9th International Conference on Solid-State and Integrated-Circuit Technology Pub Date : 2008-12-30 DOI:10.1109/ICSICT.2008.4734520

Z. Gan, Y. Wu, K. Zheng, R. Guo, C. Liao

{"title":"快速确定ILD Vbd失败根本原因的方法","authors":"Z. Gan, Y. Wu, K. Zheng, R. Guo, C. Liao","doi":"10.1109/ICSICT.2008.4734520","DOIUrl":null,"url":null,"abstract":"At the process development stage, the non-uniformity of the BEOL dielectric breakdown voltage (Vbd) in a wafer mapping is always observed. Such non-uniformity may be induced either by ¿interface-mode¿ or by ¿CD-mode¿. This paper provides a fast method to identify the root cause for ILD Vbd fail through analyzing the current-voltage (I-V) curves from the V-ramp test.","PeriodicalId":436457,"journal":{"name":"2008 9th International Conference on Solid-State and Integrated-Circuit Technology","volume":"25 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Fast method to identify the root cause for ILD Vbd fail\",\"authors\":\"Z. Gan, Y. Wu, K. Zheng, R. Guo, C. Liao\",\"doi\":\"10.1109/ICSICT.2008.4734520\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"At the process development stage, the non-uniformity of the BEOL dielectric breakdown voltage (Vbd) in a wafer mapping is always observed. Such non-uniformity may be induced either by ¿interface-mode¿ or by ¿CD-mode¿. This paper provides a fast method to identify the root cause for ILD Vbd fail through analyzing the current-voltage (I-V) curves from the V-ramp test.\",\"PeriodicalId\":436457,\"journal\":{\"name\":\"2008 9th International Conference on Solid-State and Integrated-Circuit Technology\",\"volume\":\"25 3\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 9th International Conference on Solid-State and Integrated-Circuit Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSICT.2008.4734520\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 9th International Conference on Solid-State and Integrated-Circuit Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSICT.2008.4734520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

在工艺开发阶段，通常会观察到晶圆映射中BEOL介质击穿电压(Vbd)的不均匀性。这种不均匀性可以由“界面模式”或“cd模式”引起。本文通过分析v -斜坡试验的电流-电压(I-V)曲线，提供了一种快速识别ILD Vbd故障根本原因的方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Fast method to identify the root cause for ILD Vbd fail

At the process development stage, the non-uniformity of the BEOL dielectric breakdown voltage (Vbd) in a wafer mapping is always observed. Such non-uniformity may be induced either by ¿interface-mode¿ or by ¿CD-mode¿. This paper provides a fast method to identify the root cause for ILD Vbd fail through analyzing the current-voltage (I-V) curves from the V-ramp test.

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2008 9th International Conference on Solid-State and Integrated-Circuit Technology

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