具有优化沉降性能的全差分增益增强折叠级联码运放设计

Su Li, Qiu Yulin
{"title":"具有优化沉降性能的全差分增益增强折叠级联码运放设计","authors":"Su Li, Qiu Yulin","doi":"10.1109/EDSSC.2005.1635302","DOIUrl":null,"url":null,"abstract":"A single stage fully differential operational amplifier was designed in SMIC 0.25um mix-signal CMOS technology with 2.5V power supply. The designed op amp utilizes gain-boosting technique. The main op amp is a fully differential folded-cascode op amp with switched-capacitor CMFB. Two fully differential folded-cascode op amps with continuous-time CMFBs are used as auxiliary op amps to increase the open-loop gain of the main op amp. In addition, a simulation-based optimization method for the high-speed design of gain-boosted op amp was also presented. The simulation results show that the designed op amp achieves a dc gain of 102dB with a unity-gain frequency of 822 MHz. With the high-speed optimization, the 0.0488% settling time is 3.5ns.","PeriodicalId":429314,"journal":{"name":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","volume":" 5","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"Design of a Fully Differential Gain-Boosted Folded-Cascode Op Amp with Settling Performance Optimization\",\"authors\":\"Su Li, Qiu Yulin\",\"doi\":\"10.1109/EDSSC.2005.1635302\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A single stage fully differential operational amplifier was designed in SMIC 0.25um mix-signal CMOS technology with 2.5V power supply. The designed op amp utilizes gain-boosting technique. The main op amp is a fully differential folded-cascode op amp with switched-capacitor CMFB. Two fully differential folded-cascode op amps with continuous-time CMFBs are used as auxiliary op amps to increase the open-loop gain of the main op amp. In addition, a simulation-based optimization method for the high-speed design of gain-boosted op amp was also presented. The simulation results show that the designed op amp achieves a dc gain of 102dB with a unity-gain frequency of 822 MHz. With the high-speed optimization, the 0.0488% settling time is 3.5ns.\",\"PeriodicalId\":429314,\"journal\":{\"name\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"volume\":\" 5\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2005.1635302\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2005.1635302","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19

摘要

采用中芯国际0.25um混合信号CMOS技术,采用2.5V电源,设计了单级全差分运算放大器。所设计的运放采用增益增强技术。主运放是一个带开关电容CMFB的全差分折叠级联运放。采用两个带连续时间cmfb的全差分折叠级联放大器作为辅助运放,提高了主运放的开环增益。此外,提出了一种基于仿真的增益提升运放高速设计优化方法。仿真结果表明,所设计的运放的直流增益为102dB,单位增益频率为822 MHz。在高速优化下,0.0488%的沉淀时间为3.5ns。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of a Fully Differential Gain-Boosted Folded-Cascode Op Amp with Settling Performance Optimization
A single stage fully differential operational amplifier was designed in SMIC 0.25um mix-signal CMOS technology with 2.5V power supply. The designed op amp utilizes gain-boosting technique. The main op amp is a fully differential folded-cascode op amp with switched-capacitor CMFB. Two fully differential folded-cascode op amps with continuous-time CMFBs are used as auxiliary op amps to increase the open-loop gain of the main op amp. In addition, a simulation-based optimization method for the high-speed design of gain-boosted op amp was also presented. The simulation results show that the designed op amp achieves a dc gain of 102dB with a unity-gain frequency of 822 MHz. With the high-speed optimization, the 0.0488% settling time is 3.5ns.
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