Digital redesign of a continuous controller based on closed loop performance

The authors present a digital controller redesign philosophy which attempts to match the closed-loop performance of a nominal continuous-time controller using a model-following design setting. The requirement of excessive sampling rates necessary with a number of popular existing techniques (e.g. the prewarped bilinear transform redesign) is largely obviated. Sampling rates close to twice the closed-loop bandwidth (Nyquist rate) give good performance with the proposed technique. It is concluded that the proposed model can be used as is for an analog-to-digital redesign which appears to work favorably at low sampling rates, or it can be used as a starting point for further pole-zero placement.<>