A 130nm canary SRAM for SRAM dynamic write VMIN tracking across voltage, frequency, and temperature variations

A. Banerjee, J. Breiholz, B. Calhoun
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引用次数: 4

Abstract

With device scaling in bulk technologies, process variation increases and SRAM VMIN scaling faces a bottleneck. Using peripheral assist techniques, we can lower the VMIN at the cost of energy and area. However, the SRAM VMIN is highly dependent on voltage, temperature, and operating frequency fluctuations, which are hard to determine in real time. Prior work shows theoretically that canary SRAMs using reverse assist can track SRAM dynamic write VMIN. In this paper, we show the first silicon results of a working 512b canary SRAM using bitline and wordline type reverse assists in a 130nm bulk technology. It has distinct canary failure trends across voltage, frequency, and temperature variations to track an 8Kb SRAM's dynamic write VMIN.
一个130nm金丝雀SRAM,用于SRAM动态写入VMIN跟踪跨电压,频率和温度变化
随着批量技术中器件的扩展,工艺变化增加,SRAM VMIN扩展面临瓶颈。使用外围辅助技术,我们可以以能量和面积为代价降低VMIN。然而,SRAM的VMIN高度依赖于电压、温度和工作频率波动,这些很难实时确定。先前的研究表明,理论上使用反向辅助的金丝雀SRAM可以跟踪SRAM的动态写入VMIN。在本文中,我们展示了在130nm批量技术中使用位线和字线类型反向辅助的512b金丝雀SRAM的第一个硅结果。它在电压、频率和温度变化中具有明显的金丝金丝鼠故障趋势,以跟踪8Kb SRAM的动态写VMIN。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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