Large local magnetoresistance at room temperature in Si<100> devices.

M. Ishikawa, M. Tsukahara, M. Yamada, Y. Saito, K. Hamaya
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In this paper, we show relatively large MR ratios at room temperature in Si $< 100 >$ lateral spin valves (LSVs) with a small size $(0.305 \\mu \\mathrm {m}^{2})$ cross section in the spin-transport layer. For comparison of the crystal orientation of the Si spin-transport layers, we prepared two kinds of LSVs along Si $< 100 >$ and Si $< 110 >$ with CoFe/MgO electrodes on phosphorus-doped $(n \\sim 1.3 \\times 10 ^{19}$ cm $^{-3})(100)$ textured Si on insulator (SOI) ($\\sim 61$ nm) layer, as shown in Fig. 1(a). An MgO (1.1 nm) tunnel barrier was deposited on the SOI spin-transport layer at 200 °C by electron beam evaporation. Then, a CoFe (10 nm) and a Ru capping layer were sputtered on top of it under a base pressure less than $5 \\times 10 ^{-7}$ Pa. The MgO and CoFe layers were epitaxially grown on the (100) textured SOI, where the (100)-textured MgO layer was grown on Si(100). Device fabrication methods are described in detail elsewhere.[5] We have checked that these resistivity and Hall mobility of the Si spin-transport layer were almost the same by evaluating from longitudinal resistivity and Hall-effect measurements for Si $ < 100 >$ and Si $ < 110 >$ Hall-bar devices. Figures 1(b) and 1(c) show four-terminal nonlocal Hanle-effect curves for Si $ < 100 >$ and Si $ < 110 >$ LSVs, respectively, at a bias current of 0.5 mA at 20 K. These data mean that we can obtain reliable spin transport in Si layers in our LSVs, as shown in our previous work [5]. It should be noted that the magnitude of the spin signal, $\\vert \\Delta R_{NL}\\vert $, for Si $ < 100 >$ is approximately twice as large as that for Si $ < 110 >$. Although the detailed will be published elsewhere [6], it is inferred that this phenomenon is tentatively interpreted by the difference in the spin injection/detection efficiency associated with the valley structures of the conduction band in Si. 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引用次数: 1

Abstract

A spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) is one of the emerging devices for the low power consumption in silicon-based electronics from the viewpoint of logic-in-memory architectures [1]. To realize these kinds of spintronic applications, one of the main issues for realizing the spin-MOSFETs is an observation of the high magnetoresistance (MR) ratio obtained by two-terminal local measurements at room temperature [2]. Up to now, although there are lots of studies of the local MR effect through the silicon (Si) channels, the values of the MR ratio are less than 0.8 % at 100 K [3] and 0.03 % at room temperature [4]. In this paper, we show relatively large MR ratios at room temperature in Si $< 100 >$ lateral spin valves (LSVs) with a small size $(0.305 \mu \mathrm {m}^{2})$ cross section in the spin-transport layer. For comparison of the crystal orientation of the Si spin-transport layers, we prepared two kinds of LSVs along Si $< 100 >$ and Si $< 110 >$ with CoFe/MgO electrodes on phosphorus-doped $(n \sim 1.3 \times 10 ^{19}$ cm $^{-3})(100)$ textured Si on insulator (SOI) ($\sim 61$ nm) layer, as shown in Fig. 1(a). An MgO (1.1 nm) tunnel barrier was deposited on the SOI spin-transport layer at 200 °C by electron beam evaporation. Then, a CoFe (10 nm) and a Ru capping layer were sputtered on top of it under a base pressure less than $5 \times 10 ^{-7}$ Pa. The MgO and CoFe layers were epitaxially grown on the (100) textured SOI, where the (100)-textured MgO layer was grown on Si(100). Device fabrication methods are described in detail elsewhere.[5] We have checked that these resistivity and Hall mobility of the Si spin-transport layer were almost the same by evaluating from longitudinal resistivity and Hall-effect measurements for Si $ < 100 >$ and Si $ < 110 >$ Hall-bar devices. Figures 1(b) and 1(c) show four-terminal nonlocal Hanle-effect curves for Si $ < 100 >$ and Si $ < 110 >$ LSVs, respectively, at a bias current of 0.5 mA at 20 K. These data mean that we can obtain reliable spin transport in Si layers in our LSVs, as shown in our previous work [5]. It should be noted that the magnitude of the spin signal, $\vert \Delta R_{NL}\vert $, for Si $ < 100 >$ is approximately twice as large as that for Si $ < 110 >$. Although the detailed will be published elsewhere [6], it is inferred that this phenomenon is tentatively interpreted by the difference in the spin injection/detection efficiency associated with the valley structures of the conduction band in Si. We hereafter focus on the MR effect that is one of the most important points for realizing the spin-MOSFETs. Figures 2(a) and 2(b) display the two-terminal local-MR signals for Si $ < 100 >$ and Si $ < 110 >$ LSVs, respectively, at 20 K. Here the bias current is 0.5 mA. It should be noted that the magnitude of the local-MR signals, $\vert \Delta R_{L}\vert $, for Si $ < 100 >$ is also larger than that for Si $ < 110 >$. Irrespective of measurement schemes, we can find the large difference in the spin injection/detection efficiency between Si $ < 100 >$ and Si $ < 110 >$ LSVs. We can also observe this effect even at room temperature (303 K), as shown in Fig. 2(c) and 2(d). Thanks to the crystal orientation effect, a relatively large $\vert \Delta R_{L}\vert $ of $2 \Omega $, which is the largest $\vert \Delta R_{L}\vert $ value reported so far, can be obtained. The estimated MR ratio is approximately 0.06 %, twice as large as that observed in the previous work [4]. For a different bias current condition, the MR ratio reached up to approximately 0.2 % at room temperature. Although the obtained value of the MR ratio is still insufficient to realize the spin-MOSFETs, the use of Si $ < 100 >$ spin-transport channel is more effective to develop the related Si-based devices. This work was partly supported by a Grant-in-Aid for Scientic Research (A) (No. No. 16H02333) from the Japan Society for the Promotion of Science (JSPS), and a Grant-in-Aid for Scientic Research on Innovative Areas “Nano Spin Conversion Science” (No. 26103003) from the Ministry of Education, Culture, Sports, Science, and Technology (MEXT).
室温下硅器件的大局部磁阻。
自旋金属氧化物半导体场效应晶体管(自旋mosfet)是从逻辑存储器架构的角度来看,是硅基电子器件中低功耗的新兴器件之一[1]。为了实现这些自旋电子应用,实现自旋mosfet的主要问题之一是在室温下通过双端局部测量获得高磁阻(MR)比的观察[2]。到目前为止,虽然有很多关于硅通道局部磁流变效应的研究,但磁流变比的数值都小于0.8 % at 100 K [3] and 0.03 % at room temperature [4]. In this paper, we show relatively large MR ratios at room temperature in Si $< 100 >$ lateral spin valves (LSVs) with a small size $(0.305 \mu \mathrm {m}^{2})$ cross section in the spin-transport layer. For comparison of the crystal orientation of the Si spin-transport layers, we prepared two kinds of LSVs along Si $< 100 >$ and Si $< 110 >$ with CoFe/MgO electrodes on phosphorus-doped $(n \sim 1.3 \times 10 ^{19}$ cm $^{-3})(100)$ textured Si on insulator (SOI) ($\sim 61$ nm) layer, as shown in Fig. 1(a). An MgO (1.1 nm) tunnel barrier was deposited on the SOI spin-transport layer at 200 °C by electron beam evaporation. Then, a CoFe (10 nm) and a Ru capping layer were sputtered on top of it under a base pressure less than $5 \times 10 ^{-7}$ Pa. The MgO and CoFe layers were epitaxially grown on the (100) textured SOI, where the (100)-textured MgO layer was grown on Si(100). Device fabrication methods are described in detail elsewhere.[5] We have checked that these resistivity and Hall mobility of the Si spin-transport layer were almost the same by evaluating from longitudinal resistivity and Hall-effect measurements for Si $ < 100 >$ and Si $ < 110 >$ Hall-bar devices. Figures 1(b) and 1(c) show four-terminal nonlocal Hanle-effect curves for Si $ < 100 >$ and Si $ < 110 >$ LSVs, respectively, at a bias current of 0.5 mA at 20 K. These data mean that we can obtain reliable spin transport in Si layers in our LSVs, as shown in our previous work [5]. It should be noted that the magnitude of the spin signal, $\vert \Delta R_{NL}\vert $, for Si $ < 100 >$ is approximately twice as large as that for Si $ < 110 >$. Although the detailed will be published elsewhere [6], it is inferred that this phenomenon is tentatively interpreted by the difference in the spin injection/detection efficiency associated with the valley structures of the conduction band in Si. We hereafter focus on the MR effect that is one of the most important points for realizing the spin-MOSFETs. Figures 2(a) and 2(b) display the two-terminal local-MR signals for Si $ < 100 >$ and Si $ < 110 >$ LSVs, respectively, at 20 K. Here the bias current is 0.5 mA. It should be noted that the magnitude of the local-MR signals, $\vert \Delta R_{L}\vert $, for Si $ < 100 >$ is also larger than that for Si $ < 110 >$. Irrespective of measurement schemes, we can find the large difference in the spin injection/detection efficiency between Si $ < 100 >$ and Si $ < 110 >$ LSVs. We can also observe this effect even at room temperature (303 K), as shown in Fig. 2(c) and 2(d). Thanks to the crystal orientation effect, a relatively large $\vert \Delta R_{L}\vert $ of $2 \Omega $, which is the largest $\vert \Delta R_{L}\vert $ value reported so far, can be obtained. The estimated MR ratio is approximately 0.06 %, twice as large as that observed in the previous work [4]. For a different bias current condition, the MR ratio reached up to approximately 0.2 % at room temperature. Although the obtained value of the MR ratio is still insufficient to realize the spin-MOSFETs, the use of Si $ < 100 >$ spin-transport channel is more effective to develop the related Si-based devices. This work was partly supported by a Grant-in-Aid for Scientic Research (A) (No. No. 16H02333) from the Japan Society for the Promotion of Science (JSPS), and a Grant-in-Aid for Scientic Research on Innovative Areas “Nano Spin Conversion Science” (No. 26103003) from the Ministry of Education, Culture, Sports, Science, and Technology (MEXT).
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