An injection locked PLL for power supply variation robustness using negative phase shift phenomenon of injection locked frequency divider

Dongil Lee, Taeho Lee, Yong-Hun Kim, Young-Ju Kim, L. Kim
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引用次数: 5

Abstract

This paper presents a 2 GHz injection-locked PLL (ILPLL) with an injection-locked frequency divider (ILFD). Using a negative phase shift phenomenon of the ILFD, injection timing can be calibrated without a delay line. As a result, the proposed ILPLL achieves a simple background injection timing calibration for robustness of power supply variation. The test core has been fabricated in 65nm CMOS process consuming 3.74mW at 0.9V supply voltage.
利用注入锁定分频器的负相移现象,实现电源变化鲁棒性的注入锁定锁相环
提出了一种带注入锁定分频器的2ghz注入锁定锁相环(ILPLL)。利用ILFD的负相移现象,可以在没有延迟线的情况下校准注入时间。因此,所提出的ILPLL实现了简单的背景注入定时校准,以保证电源变化的鲁棒性。测试芯采用65nm CMOS工艺,在0.9V电源电压下消耗3.74mW。
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