Substrate network modeling of RF Power LDMOS devices including nonlinear effects

Abstract

Substrate network modeling of RF Power LDMOS devices is important for accurate modeling at higher frequencies. Substrate losses can account for a considerable amount of the losses in the device and directly affects the efficiency, which is one of the most critical performance criteria of a power amplifier. In this paper, an improved substrate network model for RF Power LDMOS devices is presented that can more accurately predict these losses and be of help in designing improved device structures. Nonlinear resistors representing a depleting drain to body junction as a function of drain to source bias are included in a physical way. It is shown that the model gives good agreement with s-parameters for varying LDD lengths and as a function of drain to source bias.