Design issues of the high-frequency interleaved DC/DC boost converter with Silicon Carbide MOSFETs

M. Zdanowski, J. Rąbkowski, R. Barlik
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引用次数: 8

Abstract

This paper discusses design issues of the high-frequency, four-leg interleaved DC/DC boost converter (6kW/650V ) that combines high efficiency with high power density. Low switching energies of the applied SiC MOSFETs and Schottky diodes offer operation at high switching frequency. Together with suitable phase-shift of the control signals this leads to input/output current frequency multiplication up to 0.5MHz. Such a high frequencies and cancellation of the current ripples result in a significant reduction of the passive components, especially input inductors. The paper contains discussion of the converter operation and special solution the MOSFET gate drivers with CPLD logic. A design study regarding SiC semiconductors, inductors and cooling system, is also provided. Discussed issues are illustrated by simulation and experimental results. The 4×125kHz DC/DC boost converter (volume 0,75dm3) reaches efficiency close to 99% at nominal power of 6kW.
碳化硅mosfet高频交错DC/DC升压变换器的设计问题
本文讨论了高效率与高功率密度相结合的高频四支路交错DC/DC升压变换器(6kW/650V)的设计问题。应用的SiC mosfet和肖特基二极管的低开关能量提供了高开关频率的工作。加上控制信号的适当相移,这导致输入/输出电流频率倍增高达0.5MHz。如此高的频率和电流波纹的消除导致无源元件,特别是输入电感的显著减少。本文讨论了基于CPLD逻辑的MOSFET栅极驱动器的变换器工作和特殊解决方案。对SiC半导体、电感和冷却系统进行了设计研究。通过仿真和实验结果说明了所讨论的问题。4×125kHz DC/DC升压转换器(体积0.75 dm3)在标称功率为6kW时效率接近99%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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