Energy Efficient and Low dynamic power Consumption TCAM on FPGA

Abstract

: Ternary Content Addressable Memories [TCAM] based on Field Programmable Gate Arrays [FPGA] are widely used in artificial intelligence [AI] and networking applications. TCAM macros are unavailable within the FPGA; therefore, they must be emulated using SRAM-based memories, which require FPGA resources. Compared to state-of-the-art designs, the proposed FPGA-based TCAM implementation will save significant resources. This methodology makes use of the Lookup Table RAMS (LUTRAMs), slice carry-chains, and flip-flops (FF) allowing simultaneous mapping of rules and deeper pipelining respectively. The TCAM implementation results in lower power consumption, fewer delays and lower resource utilization. It outperforms conventional FPGA-based TCAMs in terms of energy efficiency (EE) and performance per area (PA) by at least 3.34 and 8.4 times respectively, and 56% better than existing FPGA designs. The proposed method outperforms all previous approaches due to its low dynamic power consumption when considering the huge size of TCAM emulation on SRAM-based FPGAs.