A reconfigurable mostly-digital ΔΣ ADC with a worst-case FOM of 160dB

Abstract

A 0.075 mm² 65 nm CMOS VCO-based ΔΣ modulator ADC that operates from a single 0.9-1.2 V supply is presented. Its sample-rate, f_s, is tunable from 1.3-2.4 GHz over which the SNDR spans 70-75 dB, the bandwidth spans 5-37.5 MHz, and the minimum SNDR + 10 log(bandwidth/power dissipation) figure of merit (FOM) is 160 dB.