Pre-shipment Data-retention/Read-disturb Lifetime Prediction & Aftermarket Cell Error Detection & Correction by Neural Network for 3D-TLC NAND Flash Memory

Abstract

This paper proposes 2 neural network (NN) techniques for 3D-TLC (Triple-Level Cell) NAND flash memory. 1) Predict data-retention/read-disturb lifetime for chip sorting during preshipment test. 2) Detect and correct errors in aftermarket. First, in pre-shipment test, Neural Network-based Lifetime Prediction (NNLP) predicts ECC decoding fail rate (EDFR) and estimates data-retention/read-disturb lifetime. Based on predicted lifetime, NNLP sorts NAND flash. Second, in aftermarket, Neural Network-based Error Detection (NNED) detects and corrects errors. NNED decreases bit-error rate (BER) by 81.4%.