Demonstration of an optical chip-to-chip link in a 3D integrated electronic-photonic platform

K. Settaluri, Sen Lin, S. Moazeni, E. Timurdogan, Chen Sun, M. Moresco, Z. Su, Yu-hsin Chen, G. Leake, D. LaTulipe, C. McDonough, J. Hebding, D. Coolbaugh, M. Watts, V. Stojanović
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引用次数: 45

Abstract

A full optical chip-to-chip link is demonstrated for the first time in a wafer-scale heterogeneous platform, where the photonics and CMOS chips are 3D integrated using wafer bonding and low-parasitic capacitance thru-oxide vias (TOVs). This development platform yields 1000s of functional photonic components as well as 16M transistors per chip module. The transmitter operates at 6Gb/s with an energy cost of 100fJ/bit and the receiver at 7Gb/s with a sensitivity of 26μA (-14.5dBm) and 340fJ/bit energy consumption. A full 5Gb/s chip-to-chip link, with the on-chip calibration and self-test, is demonstrated over a 100m single mode optical fiber with 560fJ/bit of electrical and 4.2pJ/bit of optical energy.
三维集成电子-光子平台中光学片对片链路的演示
在晶圆级异构平台上首次展示了全光芯片到芯片链路,其中光子学和CMOS芯片使用晶圆键合和低寄生电容通过氧化物过孔(tov)进行3D集成。该开发平台可生产1000个功能光子元件,每个芯片模块可生产16M晶体管。发射机工作速度为6Gb/s,能量消耗为100fJ/bit;接收机工作速度为7Gb/s,灵敏度为26μA (-14.5dBm),能量消耗为340fJ/bit。一个完整的5Gb/s片对片链路,具有片上校准和自检,在100米单模光纤上演示,电功率为560fJ/bit,光能为4.2pJ/bit。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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