Write intensity prediction for energy-efficient non-volatile caches

Junwhan Ahn, S. Yoo, Kiyoung Choi
{"title":"Write intensity prediction for energy-efficient non-volatile caches","authors":"Junwhan Ahn, S. Yoo, Kiyoung Choi","doi":"10.1109/ISLPED.2013.6629298","DOIUrl":null,"url":null,"abstract":"This paper presents a novel concept called write intensity prediction for energy-efficient non-volatile caches as well as the architecture that implements the concept. The key idea is to correlate write intensity of cache blocks with addresses of memory access instructions that incur cache misses of those blocks. The predictor keeps track of instructions that tend to load write-intensive blocks and utilizes that information to predict write intensity of blocks. Based on this concept, we propose a block placement strategy driven by write intensity prediction for SRAM/STT-RAM hybrid caches. Experimental results show that the proposed approach reduces write energy consumption by 55% on average compared to the existing hybrid cache architecture.","PeriodicalId":20456,"journal":{"name":"Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2013-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISLPED.2013.6629298","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 33

Abstract

This paper presents a novel concept called write intensity prediction for energy-efficient non-volatile caches as well as the architecture that implements the concept. The key idea is to correlate write intensity of cache blocks with addresses of memory access instructions that incur cache misses of those blocks. The predictor keeps track of instructions that tend to load write-intensive blocks and utilizes that information to predict write intensity of blocks. Based on this concept, we propose a block placement strategy driven by write intensity prediction for SRAM/STT-RAM hybrid caches. Experimental results show that the proposed approach reduces write energy consumption by 55% on average compared to the existing hybrid cache architecture.
高能效非易失性缓存的写入强度预测
本文提出了节能非易失性缓存的写强度预测的新概念,以及实现该概念的体系结构。关键思想是将缓存块的写强度与导致这些块缓存丢失的内存访问指令的地址相关联。预测器跟踪那些倾向于加载写密集型块的指令,并利用这些信息来预测块的写强度。基于这一概念,我们提出了一种基于写入强度预测的SRAM/STT-RAM混合缓存块放置策略。实验结果表明,与现有的混合缓存结构相比,该方法平均减少了55%的写能耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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