Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures

Hassan Anwar, Syed M. A. H. Jafri, Sergei Dytckov, M. Daneshtalab, M. Ebrahimi, A. Hemani, J. Plosila, G. Beltrame, H. Tenhunen
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引用次数: 4

Abstract

Today, reconfigurable architectures are becoming increasingly popular as the candidate platforms for neural networks. Existing works, that map neural networks on reconfigurable architectures, only address either FPGAs or Networks-on-chip, without any reference to the Coarse-Grain Reconfigurable Architectures (CGRAs). In this paper we investigate the overheads imposed by implementing spiking neural networks on a Coarse Grained Reconfigurable Architecture (CGRAs). Experimental results (using point to point connectivity) reveal that up to 1000 neurons can be connected, with an average response time of 4.4 msec.
基于粗粒度可重构结构的脉冲神经网络研究
如今,可重构架构作为神经网络的候选平台越来越受欢迎。现有的将神经网络映射到可重构架构上的工作,只针对fpga或片上网络,而没有任何参考粗粒度可重构架构(CGRAs)。在本文中,我们研究了在粗粒度可重构架构(CGRAs)上实现峰值神经网络所带来的开销。实验结果(使用点对点连接)表明,可以连接多达1000个神经元,平均响应时间为4.4毫秒。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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