Design of a wideband 6-anode frequency tripler at 300 GHz with optimum balance

Abstract

We report on the design methodology of a fix-tuned split-block waveguide balanced frequency tripler working nominally at 300 GHz. It features six GaAs Schottky planar diodes in a balanced configuration. The circuit is fabricated with JPL membrane technology in order to minimize dielectric loading and insure an accurate and uniform thickness of the substrate. The multiplier power handling is limited by the breakdown voltage of the diodes that depends on the doping level of the active layer. With six diodes, the current choice for the doping level leads to medium power handling capabilities of about 50 mW. Increasing the number of diodes to eight is an option but lead to increased difficulties in design and fabrication.